soc/intel/broadwell: Improve LPD0/LPD3 SerialIO ACPI methods

Creating named objects within a method is highly inefficient. So, pass a
reference to the OperationRegion field that needs to be updated instead.

Change-Id: I88272fc5cbe35427ccb5fc50789d47b66ace88fe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46967
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Angel Pons 2020-10-29 17:26:42 +01:00
parent 9f0093d208
commit 21f9650b7f
1 changed files with 54 additions and 30 deletions

View File

@ -6,34 +6,22 @@
#define SIO_BAR_LEN 0x1000 #define SIO_BAR_LEN 0x1000
// Put SerialIO device in D0 state // Put SerialIO device in D0 state
// Arg0 - BAR1 of device // Arg0 - Ref to offset 0x84 of device's PCI config space
Method (LPD0, 1, Serialized) Method (LPD0, 1, Serialized)
{ {
OperationRegion (SPRT, SystemMemory, Arg0 + 0x84, 4) DeRefOf (Arg0) &= 0xFFFFFFFC
Field (SPRT, DWordAcc, NoLock, Preserve) Local0 = DeRefOf (Arg0) // Read back after writing
{
SPCS, 32
}
SPCS &= 0xFFFFFFFC
Local0 = SPCS // Read back after writing
// Use Local0 to avoid iasl warning: Method Local is set but never used // Use Local0 to avoid iasl warning: Method Local is set but never used
Local0 &= Ones Local0 &= Ones
} }
// Put SerialIO device in D3 state // Put SerialIO device in D3 state
// Arg0 - BAR1 of device // Arg0 - Ref to offset 0x84 of device's PCI config space
Method (LPD3, 1, Serialized) Method (LPD3, 1, Serialized)
{ {
OperationRegion (SPRT, SystemMemory, Arg0 + 0x84, 4) DeRefOf (Arg0) |= 0x3
Field (SPRT, DWordAcc, NoLock, Preserve) Local0 = DeRefOf (Arg0) // Read back after writing
{
SPCS, 32
}
SPCS |= 0x3
Local0 = SPCS // Read back after writing
// Use Local0 to avoid iasl warning: Method Local is set but never used // Use Local0 to avoid iasl warning: Method Local is set but never used
Local0 &= Ones Local0 &= Ones
@ -226,14 +214,20 @@ Device (I2C0)
} }
} }
OperationRegion (SPRT, SystemMemory, \S1B1 + 0x84, 4)
Field (SPRT, DWordAcc, NoLock, Preserve)
{
SPCS, 32
}
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
^^LPD0 (\S1B1) ^^LPD0 (RefOf (SPCS))
} }
Method (_PS3, 0, Serialized) Method (_PS3, 0, Serialized)
{ {
^^LPD3 (\S1B1) ^^LPD3 (RefOf (SPCS))
} }
} }
@ -297,14 +291,20 @@ Device (I2C1)
} }
} }
OperationRegion (SPRT, SystemMemory, \S2B1 + 0x84, 4)
Field (SPRT, DWordAcc, NoLock, Preserve)
{
SPCS, 32
}
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
^^LPD0 (\S2B1) ^^LPD0 (RefOf (SPCS))
} }
Method (_PS3, 0, Serialized) Method (_PS3, 0, Serialized)
{ {
^^LPD3 (\S2B1) ^^LPD3 (RefOf (SPCS))
} }
} }
@ -353,14 +353,20 @@ Device (SPI0)
} }
} }
OperationRegion (SPRT, SystemMemory, \S3B1 + 0x84, 4)
Field (SPRT, DWordAcc, NoLock, Preserve)
{
SPCS, 32
}
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
^^LPD0 (\S3B1) ^^LPD0 (RefOf (SPCS))
} }
Method (_PS3, 0, Serialized) Method (_PS3, 0, Serialized)
{ {
^^LPD3 (\S3B1) ^^LPD3 (RefOf (SPCS))
} }
} }
@ -421,14 +427,20 @@ Device (SPI1)
} }
} }
OperationRegion (SPRT, SystemMemory, \S4B1 + 0x84, 4)
Field (SPRT, DWordAcc, NoLock, Preserve)
{
SPCS, 32
}
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
^^LPD0 (\S4B1) ^^LPD0 (RefOf (SPCS))
} }
Method (_PS3, 0, Serialized) Method (_PS3, 0, Serialized)
{ {
^^LPD3 (\S4B1) ^^LPD3 (RefOf (SPCS))
} }
} }
@ -489,14 +501,20 @@ Device (UAR0)
} }
} }
OperationRegion (SPRT, SystemMemory, \S5B1 + 0x84, 4)
Field (SPRT, DWordAcc, NoLock, Preserve)
{
SPCS, 32
}
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
^^LPD0 (\S5B1) ^^LPD0 (RefOf (SPCS))
} }
Method (_PS3, 0, Serialized) Method (_PS3, 0, Serialized)
{ {
^^LPD3 (\S5B1) ^^LPD3 (RefOf (SPCS))
} }
} }
@ -545,14 +563,20 @@ Device (UAR1)
} }
} }
OperationRegion (SPRT, SystemMemory, \S6B1 + 0x84, 4)
Field (SPRT, DWordAcc, NoLock, Preserve)
{
SPCS, 32
}
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
^^LPD0 (\S6B1) ^^LPD0 (RefOf (SPCS))
} }
Method (_PS3, 0, Serialized) Method (_PS3, 0, Serialized)
{ {
^^LPD3 (\S6B1) ^^LPD3 (RefOf (SPCS))
} }
} }