veyron: Add exception_init() to romstage

I'm not even sure how this slipped through... looks like it had never
been there in the first place. Anyway, on ARM exceptions should always
be reinitialized in all stages to make sure the handlers are still
around (especially in an OVERLAP_VERSTAGE_ROMSTAGE board like this one).

Change-Id: Ic74ea1448d63b363f2ed59d9e2529971b3d32d9a
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15099
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/mainboard/google/veyron/romstage.c

@@ -84,6 +84,7 @@ void main(void)
 	timestamp_add_now(TS_START_ROMSTAGE);
 
 	console_init();
+	exception_init();
 	configure_l2ctlr();
 	tsadc_init();
 

src/mainboard/google/veyron_brain/romstage.c

@@ -78,6 +78,7 @@ void main(void)
 	timestamp_add_now(TS_START_ROMSTAGE);
 
 	console_init();
+	exception_init();
 	configure_l2ctlr();
 	tsadc_init();
 

src/mainboard/google/veyron_danger/romstage.c

@@ -79,6 +79,7 @@ void main(void)
 	timestamp_add_now(TS_START_ROMSTAGE);
 
 	console_init();
+	exception_init();
 	configure_l2ctlr();
 	tsadc_init();
 

src/mainboard/google/veyron_emile/romstage.c

@@ -78,6 +78,7 @@ void main(void)
 	timestamp_add_now(TS_START_ROMSTAGE);
 
 	console_init();
+	exception_init();
 	configure_l2ctlr();
 	tsadc_init();
 

src/mainboard/google/veyron_mickey/romstage.c

@@ -78,6 +78,7 @@ void main(void)
 	timestamp_add_now(TS_START_ROMSTAGE);
 
 	console_init();
+	exception_init();
 	configure_l2ctlr();
 	tsadc_init();
 

src/mainboard/google/veyron_rialto/romstage.c

@@ -85,6 +85,7 @@ void main(void)
 	timestamp_add_now(TS_START_ROMSTAGE);
 
 	console_init();
+	exception_init();
 	configure_l2ctlr();
 	tsadc_init();
 

src/mainboard/google/veyron_romy/romstage.c

@@ -78,6 +78,7 @@ void main(void)
 	timestamp_add_now(TS_START_ROMSTAGE);
 
 	console_init();
+	exception_init();
 	configure_l2ctlr();
 	tsadc_init();