sb/ricoh/rl5c476/rl5c476.c: Use tab for indents
Change-Id: I3967d1ff0623037efa66927843e0c47f408832d7 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/17582 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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1 changed files with 11 additions and 11 deletions
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@ -163,9 +163,9 @@ static void rl5c476_read_resources(device_t dev)
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struct resource *resource;
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struct resource *resource;
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/* For CF socket we need an extra memory window for
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/* For CF socket we need an extra memory window for
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* the control structure of the CF itself
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* the control structure of the CF itself
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*/
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*/
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if ( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
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if ( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
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/* fake index as it isn't in PCI config space */
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/* fake index as it isn't in PCI config space */
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resource = new_resource(dev, 1);
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resource = new_resource(dev, 1);
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@ -196,18 +196,18 @@ static void rl5c476_set_resources(device_t dev)
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static void rl5c476_set_subsystem(device_t dev, unsigned vendor, unsigned device)
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static void rl5c476_set_subsystem(device_t dev, unsigned vendor, unsigned device)
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{
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{
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u16 miscreg = pci_read_config16(dev, 0x82);
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u16 miscreg = pci_read_config16(dev, 0x82);
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/* Enable subsystem id register writes */
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/* Enable subsystem id register writes */
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pci_write_config16(dev, 0x82, miscreg | 0x40);
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pci_write_config16(dev, 0x82, miscreg | 0x40);
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pci_write_config16(dev, 0x40, vendor);
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pci_write_config16(dev, 0x40, vendor);
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pci_write_config16(dev, 0x42, device);
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pci_write_config16(dev, 0x42, device);
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/* restore original contents */
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/* restore original contents */
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pci_write_config16(dev, 0x82, miscreg);
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pci_write_config16(dev, 0x82, miscreg);
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}
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}
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static struct pci_operations rl5c476_pci_ops = {
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static struct pci_operations rl5c476_pci_ops = {
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.set_subsystem = rl5c476_set_subsystem,
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.set_subsystem = rl5c476_set_subsystem,
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};
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};
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static struct device_operations ricoh_rl5c476_ops = {
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static struct device_operations ricoh_rl5c476_ops = {
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