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soc/intel/*lake: Load vbt when it's needed 

That removes the need for another global variable.

Change-Id: I25e12ba724836de4c8afb25cd347cafe6df8cea9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/21907
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Georgi 2017-10-06 17:36:09 +02:00
parent f2fc497228
commit 22579596ff
2 changed files with 2 additions and 12 deletions
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7
src/soc/intel/apollolake/chip.c
View File

@ -48,8 +48,6 @@
#include "chip.h"
static void *vbt;
static const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
@ -315,9 +313,6 @@ static void soc_init(void *data)
{
struct global_nvs_t *gnvs;
/* Save VBT info and mapping */
vbt = vbt_get();
/* Snapshot the current GPIO IRQ polarities. FSP is setting a
* default policy that doesn't honor boards' requirements. */
itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
@ -534,7 +529,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
static struct soc_intel_apollolake_config *cfg;
/* Load VBT before devicetree-specific config. */
silconfig->GraphicsConfigPtr = (uintptr_t)vbt;
silconfig->GraphicsConfigPtr = (uintptr_t)vbt_get();
struct device *dev = SA_DEV_ROOT;

7
src/soc/intel/cannonlake/chip.c
View File

@ -25,8 +25,6 @@
#include <soc/ramstage.h>
#include <string.h>
static void *vbt;
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
static const char *soc_acpi_name(const struct device *dev)
{
@ -180,11 +178,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Parse device tree and enable/disable devices */
parse_devicetree(params);
/* Save VBT info and mapping */
vbt = vbt_get();
/* Load VBT before devicetree-specific config. */
params->GraphicsConfigPtr = (uintptr_t)vbt;
params->GraphicsConfigPtr = (uintptr_t)vbt_get();
/* Set USB OC pin to 0 first */
for (i = 0; i < ARRAY_SIZE(params->Usb2OverCurrentPin); i++) {