mb/google/poppy/variants/nami: Perform PL2 setting for syndra

According to syndra thermal table, PL2 need to check cpu id.
Set up syndra PL2 value.
1. KBL_U PL2 is 25w.
2. KBL_R PL2 is 29w.

Refer to b:116836990#comment10.

BUG=b:116836990
TEST=The thermal team verify OK

Change-Id: I766a886121a089683565608252b4c176c70e88a3
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/29269
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Shelley Chen <shchen@google.com>
This commit is contained in:
John Su 2018-10-25 19:21:15 +08:00 committed by Furquan Shaikh
parent 7129cbf2f1
commit 2257a35862
1 changed files with 28 additions and 21 deletions

View File

@ -30,7 +30,19 @@
#define PL2_I7_SKU 44 #define PL2_I7_SKU 44
#define PL2_DEFAULT 29 #define PL2_DEFAULT 29
#define PL2_KBL_R 25 #define PL2_KBL_U 25
/* PL2 ID define*/
#define PL2_ID_DEFAULT 0
#define PL2_ID_SONA_SYNDRA 1
static const struct pl2_config {
uint32_t cpuid_y0_pl2;
uint32_t cpuid_non_y0_pl2;
} pl2_config_table[] = {
[PL2_ID_DEFAULT] = { PL2_I7_SKU, PL2_DEFAULT },
[PL2_ID_SONA_SYNDRA] = { PL2_DEFAULT, PL2_KBL_U },
};
/* Variant for AKALI */ /* Variant for AKALI */
#define AKALI_SA_AC_LOADLINE 1100 #define AKALI_SA_AC_LOADLINE 1100
@ -67,18 +79,13 @@ static const struct {
}, },
}; };
static uint32_t get_pl2(uint32_t sku_id) static uint32_t get_pl2(int pl2_id)
{ {
if ((sku_id == SKU_0_SONA) || (sku_id == SKU_1_SONA)) { assert(pl2_id < ARRAY_SIZE(pl2_config_table));
if (cpuid_eax(1) == CPUID_KABYLAKE_Y0)
return PL2_DEFAULT;
return PL2_KBL_R;
}
if (cpuid_eax(1) == CPUID_KABYLAKE_Y0) if (cpuid_eax(1) == CPUID_KABYLAKE_Y0)
return PL2_I7_SKU; return pl2_config_table[pl2_id].cpuid_y0_pl2;
return PL2_DEFAULT; return pl2_config_table[pl2_id].cpuid_non_y0_pl2;
} }
uint32_t variant_board_sku(void) uint32_t variant_board_sku(void)
@ -220,31 +227,31 @@ void variant_devtree_update(void)
int oem_index; int oem_index;
struct device *root = SA_DEV_ROOT; struct device *root = SA_DEV_ROOT;
config_t *cfg = root->chip_info; config_t *cfg = root->chip_info;
uint8_t pl2_id = PL2_ID_DEFAULT;
/* Update PL2 based on SKU. */
cfg->tdp_pl2_override = get_pl2(sku_id);
switch (sku_id) { switch (sku_id) {
case SKU_0_VAYNE:
case SKU_1_VAYNE:
case SKU_2_VAYNE:
case SKU_0_PANTHEON:
case SKU_1_PANTHEON:
case SKU_2_PANTHEON:
case SKU_0_SONA: case SKU_0_SONA:
case SKU_1_SONA: case SKU_1_SONA:
case SKU_0_SYNDRA: case SKU_0_SYNDRA:
case SKU_1_SYNDRA: case SKU_1_SYNDRA:
case SKU_2_SYNDRA: case SKU_2_SYNDRA:
case SKU_3_SYNDRA: case SKU_3_SYNDRA:
/* Disable unused port USB port */ pl2_id = PL2_ID_SONA_SYNDRA;
case SKU_0_VAYNE:
case SKU_1_VAYNE:
case SKU_2_VAYNE:
case SKU_0_PANTHEON:
case SKU_1_PANTHEON:
case SKU_2_PANTHEON:
cfg->usb2_ports[5].enable = 0; cfg->usb2_ports[5].enable = 0;
break; break;
default: default:
break; break;
} }
/* Update PL2 based on SKU. */
cfg->tdp_pl2_override = get_pl2(pl2_id);
/* Overwrite settings for different projects based on OEM ID*/ /* Overwrite settings for different projects based on OEM ID*/
oem_index = find_sku_mapping(read_oem_id()); oem_index = find_sku_mapping(read_oem_id());