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mb/google/var/redrix: Add gpios to lock 

Variant should honor locked gpios from baseboard, but not the last.
Variant can add more gpios to lock if needed.

BUG=b:216583542
TEST='emerge-brya coreboot chromeos-bootimage', flash and verify that
redrix boots successfully to kernel.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: If08ae5c96232efd03d77090c3c6979c77f95c998
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61698
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Eric Lai 2022-02-08 11:20:36 +08:00 committed by Felix Held
parent 6c10007b42
commit 228e7c2e98
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/google/brya/variants/redrix/gpio.c
View File

@ -19,9 +19,9 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_A22, NONE), PAD_NC(GPP_A22, NONE),
/* B3 : PROC_GP2 ==> NC */ /* B3 : PROC_GP2 ==> NC */
PAD_NC(GPP_B3, NONE), PAD_NC_LOCK(GPP_B3, NONE, LOCK_CONFIG),
/* B15 : TIME_SYNC0 ==> NC */ /* B15 : TIME_SYNC0 ==> NC */
PAD_NC(GPP_B15, NONE), PAD_NC_LOCK(GPP_B15, NONE, LOCK_CONFIG),
/* C3 : SML0CLK ==> NC */ /* C3 : SML0CLK ==> NC */
PAD_NC(GPP_C3, NONE), PAD_NC(GPP_C3, NONE),
@ -31,7 +31,7 @@ static const struct pad_config override_gpio_table[] = {
/* D7 : SRCCLKREQ2# ==> NC */ /* D7 : SRCCLKREQ2# ==> NC */
PAD_NC(GPP_D7, NONE), PAD_NC(GPP_D7, NONE),
/* D13 : ISH_UART0_RXD ==> NC */ /* D13 : ISH_UART0_RXD ==> NC */
PAD_NC(GPP_D13, NONE), PAD_NC_LOCK(GPP_D13, NONE, LOCK_CONFIG),
/* E3 : PROC_GP0 ==> NC */ /* E3 : PROC_GP0 ==> NC */
PAD_NC(GPP_E3, NONE), PAD_NC(GPP_E3, NONE),
@ -49,7 +49,7 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_F20, NONE), PAD_NC(GPP_F20, NONE),
/* H3 : SX_EXIT_HOLDOFF# ==> NC */ /* H3 : SX_EXIT_HOLDOFF# ==> NC */
PAD_NC(GPP_H3, NONE), PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */ /* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG), PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */ /* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */