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For the jetway jf2/4 series of mainboards: 

* change the comment for device f.0 from "IDE" to "SATA"
* turn on firewire device a.0
* turn on pata device f.1
* don't turn on the unusable device 10.5 (built-in vt8237 ethernet?)

Signed-off-by: Alex Mauer <hawke@hawkesnest.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Alex Mauer 2008-09-12 20:39:04 +00:00
parent 53bbb0f6b1
commit 229c20f3e2
1 changed files with 3 additions and 2 deletions
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5
src/mainboard/jetway/j7f24/Config.lb
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@ -97,15 +97,16 @@ chip northbridge/via/cn700 # Northbridge
# Both cables are 40pin. # Both cables are 40pin.
register "ide0_80pin_cable" = "0" register "ide0_80pin_cable" = "0"
register "ide1_80pin_cable" = "0" register "ide1_80pin_cable" = "0"
device pci f.0 on end # IDE
register "fn_ctrl_lo" = "0x80" register "fn_ctrl_lo" = "0x80"
register "fn_ctrl_hi" = "0x1d" register "fn_ctrl_hi" = "0x1d"
device pci a.0 on end # Firewire
device pci f.0 on end # SATA
device pci f.1 on end # IDE
device pci 10.0 on end # OHCI device pci 10.0 on end # OHCI
device pci 10.1 on end # OHCI device pci 10.1 on end # OHCI
device pci 10.2 on end # OHCI device pci 10.2 on end # OHCI
device pci 10.3 on end # OHCI device pci 10.3 on end # OHCI
device pci 10.4 on end # EHCI device pci 10.4 on end # EHCI
device pci 10.5 on end # UDCI
device pci 11.0 on # Southbridge LPC device pci 11.0 on # Southbridge LPC
chip superio/fintek/f71805f # Super I/O chip superio/fintek/f71805f # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy