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mb/google/brya/var/omnigul: Adjust I2C3 and I2C5 Waveform meet to SPEC 

Tuning i2c frequency ,timing ,Waveform meet to SPEC
i2c frequency :
I2C0=>399.8khz / Setup Time:1765ns / Hold Time:82.35ns.
I2C1=>390.4khz / Setup Time:1.788us / Hold Time:70.58ns.
I2C3=>308.7khz / Setup Time:1.482us / Hold Time:0.4us.
I2C5=>390.8khz / Setup Time:1.218us / Hold Time:0.405us.

BUG=b:275061994
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot,
EE check OK with test FW and TP function is normal.

Change-Id: I5b77cd3fd3ff00804f1b8dd5828dc831a9732566
Signed-off-by: Jamie Chen <jamie_chen@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74880
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Derek Huang <derekhuang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
This commit is contained in:
Jamie Chen 2023-05-02 13:32:42 +08:00 committed by Matt DeVillier
parent 50931f8ea0
commit 22b226724e
1 changed files with 12 additions and 2 deletions
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14
src/mainboard/google/brya/variants/omnigul/overridetree.cb
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@ -43,13 +43,23 @@ chip soc/intel/alderlake
.speed = I2C_SPEED_FAST,
.rise_time_ns = 600,
.fall_time_ns = 400,
.data_hold_time_ns = 50,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 190,
.scl_hcnt = 110,
.sda_hold = 40,
}
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 650,
.fall_time_ns = 400,
.data_hold_time_ns = 50,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 160,
.scl_hcnt = 70,
.sda_hold = 40,
}
},
}"