diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index b91151aee4..972b2531e2 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -46,7 +46,7 @@ static int codec_detect(u8 *base)
 	u8 reg8;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0)
+	if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
 		goto no_codec;
 
 	/* Write back the value once reset bit is set. */
diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c
index 6cf1fea165..1927adc749 100644
--- a/src/southbridge/intel/i82801gx/azalia.c
+++ b/src/southbridge/intel/i82801gx/azalia.c
@@ -43,11 +43,11 @@ static int codec_detect(u8 *base)
 	u32 reg32;
 
 	/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0)
+	if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0)
 		goto no_codec;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0)
+	if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
 		goto no_codec;
 
 	/* Read in Codec location (BAR + 0xe)[2..0] */
diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c
index 0e0ccd6b1a..d6c75339a8 100644
--- a/src/southbridge/intel/i82801ix/azalia.c
+++ b/src/southbridge/intel/i82801ix/azalia.c
@@ -43,11 +43,11 @@ static int codec_detect(u8 *base)
 	u32 reg32;
 
 	/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0)
+	if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0)
 		goto no_codec;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0)
+	if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
 		goto no_codec;
 
 	/* Read in Codec location (BAR + 0xe)[2..0] */
diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c
index 3b2289ed91..bf41490a00 100644
--- a/src/southbridge/intel/i82801jx/azalia.c
+++ b/src/southbridge/intel/i82801jx/azalia.c
@@ -43,11 +43,11 @@ static int codec_detect(u8 *base)
 	u32 reg32;
 
 	/* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, 0) < 0)
+	if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0) < 0)
 		goto no_codec;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0)
+	if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
 		goto no_codec;
 
 	/* Read in Codec location (BAR + 0xe)[2..0] */
diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c
index c947092f18..97e705e287 100644
--- a/src/southbridge/intel/ibexpeak/azalia.c
+++ b/src/southbridge/intel/ibexpeak/azalia.c
@@ -42,7 +42,7 @@ static int codec_detect(u8 *base)
 	u8 reg8;
 
 	/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
-	if (set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0)
+	if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
 		goto no_codec;
 
 	/* Write back the value once reset bit is set. */