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mb/google/volteer: Enable Audio DSP UPD 

Provide settings for configuring the link between HD-Audio controller
and display unit for purposes of HDMI/DP Audio playback.

BUG=b:144708516, b:148385924
TEST=none

Change-Id: I225faac68729b28be65b4d8f1f83769a874f84ff
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39356
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Srinidhi N Kaushik 2020-03-06 10:47:17 -08:00 committed by Furquan Shaikh
parent 6daa8c3ba5
commit 22d5b07160
1 changed files with 15 additions and 0 deletions
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15
src/mainboard/google/volteer/variants/baseboard/devicetree.cb
View File

@ -110,6 +110,21 @@ chip soc/intel/tigerlake
[PchSerialIoIndexUART2] = PchSerialIoDisabled,
}"
# HD Audio
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkHdaEnable" = "0"
register "PchHdaAudioLinkDmicEnable[0]" = "1"
register "PchHdaAudioLinkDmicEnable[1]" = "1"
register "PchHdaAudioLinkSspEnable[0]" = "1"
register "PchHdaAudioLinkSspEnable[1]" = "1"
# iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T
register "PchHdaIDispLinkTmode" = "2"
# iDisp-Link Freq 4: 96MHz, 3: 48MHz.
register "PchHdaIDispLinkFrequency" = "4"
# Not disconnected/enumerable
register "PchHdaIDispCodecDisconnect" = "0"
# TCSS USB3
register "TcssXhciEn" = "1"