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rockchip: rk3399: increase memory for fit payload. 

Increase ramstage to 2M, required to actually embed the 7.2mb uImage
into the coreboot.rom, increase the postram cbfs cache in order for the
fit image to be loadable (without this increase the fit payload is found
but not loaded)

Change-Id: Iee0ed9f7958588ceda54bb32253c84cac68abea2
Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Marty E. Plummer 2019-04-20 01:38:51 -05:00 committed by Julius Werner
parent 6672bd8e6b
commit 22e605c2c0
1 changed files with 2 additions and 2 deletions
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4
src/soc/rockchip/rk3399/include/soc/memlayout.ld
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@ -20,8 +20,8 @@ SECTIONS
{
DRAM_START(0x00000000)
BL31(0, 0x100000)
POSTRAM_CBFS_CACHE(0x00100000, 1M)
RAMSTAGE(0x00300000, 256K)
POSTRAM_CBFS_CACHE(0x00100000, 8M)
RAMSTAGE(0x00900000, 2M)
DMA_COHERENT(0x10000000, 2M)
/* 8K of special SRAM in PMU power domain. */