mb/google: Fix typos

Change-Id: I77c33c19b56dc9bd54e7555ce59f6a07bde3dbb6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS 2020-02-22 14:13:59 +01:00 committed by Patrick Georgi
parent d254fc4ac2
commit 22f8ee0f0e
18 changed files with 19 additions and 19 deletions

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@ -72,7 +72,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1D) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, Internal, Location N/A
AZALIA_PIN_CFG(0, 0x1D, 0x4015812d),

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@ -68,7 +68,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1D) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, Internal, Location N/A
AZALIA_PIN_CFG(0, 0x1D, 0x4015812d),

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@ -85,7 +85,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1D) PCBeep */
0x01d71c2d, // eapd low on ex-amp, laptop, custom enable
0x01d71d81, // mute spkr on hpout
0x01d71e15, // pcbeep en able, checksum
0x01d71e15, // pcbeep enable, checksum
0x01d71f40, // no physical, Internal, Location N/A
/* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/

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@ -32,7 +32,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
/* P2: Rear USB3.0 port, USB3R2 */
pei_data_usb2_port(pei_data, 2, 0x0080, 1, 1,
USB_PORT_INTERNAL);
/* P3: Card Rearder, CRS1 */
/* P3: Card Reader, CRS1 */
pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_INTERNAL);
/* P4: Rear USB2.0 port, USB2R1 */
@ -54,6 +54,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
pei_data_usb3_port(pei_data, 1, 1, 0, 0);
/* P3: Rear USB3.0 port, USB3R2 */
pei_data_usb3_port(pei_data, 2, 1, 1, 0);
/* P4: Card Rearder, CRS1 */
/* P4: Card Reader, CRS1 */
pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 0);
}

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@ -179,7 +179,7 @@ void lan_init(void)
/*
* Battery life time - LAN PCIe should enter ASPM L1 to save
* power when LAN connection is idle.
* enable CLKREQ: LAN pci config space 0x81h=01
* enable CLKREQ: LAN PCI config space 0x81h=01
*/
pci_write_config8(ethernet_dev, 0x81, 0x01);
}

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@ -72,7 +72,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1D) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, Internal, Location N/A
AZALIA_PIN_CFG(0, 0x1D, 0x4015812d),

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@ -72,7 +72,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1D) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, Internal, Location N/A
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -59,7 +59,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1d) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, internal
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -55,7 +55,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1d) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, internal
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -59,7 +59,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1d) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, internal
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -59,7 +59,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1d) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, internal
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -59,7 +59,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1d) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, internal
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -59,7 +59,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1D) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, internal
AZALIA_PIN_CFG(0, 0x1D, 0x4015812d),

View File

@ -78,7 +78,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1d) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, internal
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -63,7 +63,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1d) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, internal
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -63,7 +63,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1D) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, Internal, Location N/A
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -67,7 +67,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1D) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, Internal, Location N/A
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),

View File

@ -68,7 +68,7 @@ const u32 cim_verb_data[] = {
/* Pin Complex (NID 0x1D) PCBeep */
// eapd low on ex-amp, laptop, custom enable
// mute spkr on hpout
// pcbeep en able, checksum
// pcbeep enable, checksum
// no physical, Internal, Location N/A
AZALIA_PIN_CFG(0, 0x1d, 0x4015812d),