mb/google/nissa/var/nivviks: Enable pen garage

Enable pen garage. Pen detect is active low. And wake system when
eject.

BUG=b:223476974
TEST=evtest work as expected.
Input driver version is 1.0.1
Input device ID: bus 0x19 vendor 0x1 product 0x1 version 0x100
Input device name: "PRP0001:00"
Supported events:
  Event type 0 (EV_SYN)
  Event type 5 (EV_SW)
    Event code 15 (SW_PEN_INSERTED) state 0
Properties:
Testing ... (interrupt to exit)
Event: type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 1
Event: -------------- SYN_REPORT ------------
Event: type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 0

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I2f676301c3372a4760853ce9c10b75f94e22bbcd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Eric Lai 2022-03-09 13:43:31 +08:00 committed by Felix Held
parent 25c717d664
commit 232dcb938a
3 changed files with 14 additions and 1 deletions

View File

@ -83,6 +83,7 @@ config BOARD_GOOGLE_KANO
config BOARD_GOOGLE_NIVVIKS config BOARD_GOOGLE_NIVVIKS
bool "-> Nivviks" bool "-> Nivviks"
select BOARD_GOOGLE_BASEBOARD_NISSA select BOARD_GOOGLE_BASEBOARD_NISSA
select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_INTEL_MIPI_CAMERA select DRIVERS_INTEL_MIPI_CAMERA
select HAVE_WWAN_POWER_SEQUENCE select HAVE_WWAN_POWER_SEQUENCE

View File

@ -238,7 +238,7 @@ static const struct pad_config gpio_table[] = {
/* F14 : GSXDIN ==> TCHPAD_INT_ODL */ /* F14 : GSXDIN ==> TCHPAD_INT_ODL */
PAD_CFG_GPI_IRQ_WAKE(GPP_F14, NONE, PLTRST, LEVEL, INVERT), PAD_CFG_GPI_IRQ_WAKE(GPP_F14, NONE, PLTRST, LEVEL, INVERT),
/* F15 : GSXSRESET# ==> SOC_PEN_DETECT_ODL */ /* F15 : GSXSRESET# ==> SOC_PEN_DETECT_ODL */
PAD_CFG_GPI_SCI(GPP_F15, NONE, DEEP, EDGE_SINGLE, NONE), PAD_CFG_GPI_SCI_HIGH(GPP_F15, NONE, DEEP, EDGE_SINGLE),
/* F16 : NC */ /* F16 : NC */
PAD_NC(GPP_F16, NONE), PAD_NC(GPP_F16, NONE),
/* F17 : THC1_SPI2_RST# ==> EC_SOC_WAKE_ODL */ /* F17 : THC1_SPI2_RST# ==> EC_SOC_WAKE_ODL */

View File

@ -47,6 +47,18 @@ chip soc/intel/alderlake
register "hid_desc_reg_offset" = "0x01" register "hid_desc_reg_offset" = "0x01"
device i2c 15 on end device i2c 15 on end
end end
chip drivers/generic/gpio_keys
register "name" = ""PENH""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_F13)"
register "key.wake_gpe" = "GPE0_DW2_15"
register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
register "key.dev_name" = ""EJCT""
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"
register "key.label" = ""pen_eject""
device generic 0 on end
end
end end
device ref i2c2 on device ref i2c2 on
chip drivers/i2c/sx9324 chip drivers/i2c/sx9324