soc/intel/jasperlake: Hook up public microcode
Change-Id: I9e511de5e5b79936ed09538b3877655f78de15a9 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60052 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
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@ -29,7 +29,6 @@ config CPU_SPECIFIC_OPTIONS
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select MP_SERVICES_PPI_V1
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select MRC_SETTINGS_PROTECT
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select PARALLEL_MP_AP_WORK
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select MICROCODE_BLOB_UNDISCLOSED
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select PLATFORM_USES_FSP2_2
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select PMC_GLOBAL_RESET_ENABLE_LOCK
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select SOC_INTEL_COMMON
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@ -54,4 +54,6 @@ verstage-y += gpio.c
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CPPFLAGS_common += -I$(src)/soc/intel/jasperlake
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CPPFLAGS_common += -I$(src)/soc/intel/jasperlake/include
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cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9c-00
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endif
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