soc/intel/jasperlake: Hook up public microcode

Change-Id: I9e511de5e5b79936ed09538b3877655f78de15a9
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
This commit is contained in:
Arthur Heymans 2021-12-11 14:23:44 +01:00 committed by Felix Singer
parent 5f2d114842
commit 23488a1b78
2 changed files with 2 additions and 1 deletions

View File

@ -29,7 +29,6 @@ config CPU_SPECIFIC_OPTIONS
select MP_SERVICES_PPI_V1
select MRC_SETTINGS_PROTECT
select PARALLEL_MP_AP_WORK
select MICROCODE_BLOB_UNDISCLOSED
select PLATFORM_USES_FSP2_2
select PMC_GLOBAL_RESET_ENABLE_LOCK
select SOC_INTEL_COMMON

View File

@ -54,4 +54,6 @@ verstage-y += gpio.c
CPPFLAGS_common += -I$(src)/soc/intel/jasperlake
CPPFLAGS_common += -I$(src)/soc/intel/jasperlake/include
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9c-00
endif