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exynos/snow: get rid of board-specific arbitration code 

Snow's AP, EC, PMU, and smarty battery share a bus. Both the AP and
EC can act as a master, so to avoid conflicts an arbitration
mechanism consisting of two GPIOs is used.

By default, the AP "owns" the bus unless it is off (in which case
the EC doesn't monitor the arbitration pins). This means the boot
firmware does not need to worry about these lines. The payload may
if it needs to communicate with the EC, though.

In any case, board-specific bus arbitration logic does not belong
in a low-level driver that is supposed to be generic for an entire
CPU family. If the payload needs to talk to the EC, we'll deal with
it there.

Change-Id: I0774d4592af2b21b6ad668441532c5ceab988404
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2272
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
David Hendricks 2013-02-03 20:47:38 -08:00 committed by Ronald G. Minnich
parent aa6701c090
commit 2354ef8869
4 changed files with 1 additions and 51 deletions
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4
src/cpu/samsung/exynos5-common/spl.h
View File

@ -91,8 +91,4 @@ struct spl_machine_param *spl_get_machine_params(void);
*/ */
void spl_early_init(void); void spl_early_init(void);
/* FIXME(dhendrix): for early i2c init */
void board_i2c_release_bus(int node);
int board_i2c_claim_bus(int node);
#endif /* __ASM_ARCH_EXYNOS_SPL_H__ */ #endif /* __ASM_ARCH_EXYNOS_SPL_H__ */

19
src/cpu/samsung/s5p-common/s3c24x0_i2c.c
View File

@ -39,9 +39,6 @@
#include "device/i2c.h" #include "device/i2c.h"
#include "s3c24x0_i2c.h" #include "s3c24x0_i2c.h"
/* for board_i2c_* */
#include "cpu/samsung/exynos5-common/spl.h"
#define I2C_WRITE 0 #define I2C_WRITE 0
#define I2C_READ 1 #define I2C_READ 1
@ -531,12 +528,7 @@ int i2c_probe(uchar chip)
* address was <ACK>ed (i.e. there was a chip at that address which * address was <ACK>ed (i.e. there was a chip at that address which
* drove the data line low). * drove the data line low).
*/ */
if (board_i2c_claim_bus(i2c->node)) {
debug("I2C cannot claim bus %d\n", i2c->bus_num);
return -1;
}
ret = i2c_transfer(i2c->regs, I2C_READ, chip << 1, 0, 0, buf, 1); ret = i2c_transfer(i2c->regs, I2C_READ, chip << 1, 0, 0, buf, 1);
board_i2c_release_bus(i2c->node);
return ret != I2C_OK; return ret != I2C_OK;
} }
@ -578,13 +570,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
i2c = get_bus(g_current_bus); i2c = get_bus(g_current_bus);
if (!i2c) if (!i2c)
return -1; return -1;
if (board_i2c_claim_bus(i2c->node)) {
debug("I2C cannot claim bus %d\n", i2c->bus_num);
return -1;
}
ret = i2c_transfer(i2c->regs, I2C_READ, chip << 1, &xaddr[4 - alen], ret = i2c_transfer(i2c->regs, I2C_READ, chip << 1, &xaddr[4 - alen],
alen, buffer, len); alen, buffer, len);
board_i2c_release_bus(i2c->node);
if (ret) { if (ret) {
debug("I2c read: failed %d\n", ret); debug("I2c read: failed %d\n", ret);
return 1; return 1;
@ -628,13 +615,9 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
i2c = get_bus(g_current_bus); i2c = get_bus(g_current_bus);
if (!i2c) if (!i2c)
return -1; return -1;
if (board_i2c_claim_bus(i2c->node)) {
debug("I2C cannot claim bus %d\n", i2c->bus_num);
return -1;
}
ret = i2c_transfer(i2c->regs, I2C_WRITE, chip << 1, &xaddr[4 - alen], ret = i2c_transfer(i2c->regs, I2C_WRITE, chip << 1, &xaddr[4 - alen],
alen, buffer, len); alen, buffer, len);
board_i2c_release_bus(i2c->node);
return ret != 0; return ret != 0;
} }

14
src/mainboard/google/snow/bootblock.c
View File

@ -649,15 +649,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
#endif #endif
if (!i2c) if (!i2c)
return -1; return -1;
#if 0
if (board_i2c_claim_bus(i2c->node)) {
debug("I2C cannot claim bus %d\n", i2c->bus_num);
return -1;
}
#endif
ret = i2c_transfer(i2c->regs, I2C_READ, chip << 1, &xaddr[4 - alen], ret = i2c_transfer(i2c->regs, I2C_READ, chip << 1, &xaddr[4 - alen],
alen, buffer, len); alen, buffer, len);
//board_i2c_release_bus(i2c->node);
if (ret) { if (ret) {
//debug("I2c read: failed %d\n", ret); //debug("I2c read: failed %d\n", ret);
return 1; return 1;
@ -702,15 +695,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
i2c = &i2c0; i2c = &i2c0;
if (!i2c) if (!i2c)
return -1; return -1;
#if 0
if (board_i2c_claim_bus(i2c->node)) {
//debug("I2C cannot claim bus %d\n", i2c->bus_num);
return -1;
}
#endif
ret = i2c_transfer(i2c->regs, I2C_WRITE, chip << 1, &xaddr[4 - alen], ret = i2c_transfer(i2c->regs, I2C_WRITE, chip << 1, &xaddr[4 - alen],
alen, buffer, len); alen, buffer, len);
//board_i2c_release_bus(i2c->node);
return ret != 0; return ret != 0;
} }

15
src/mainboard/google/snow/smdk5250_spl.c
View File

@ -87,18 +87,3 @@ int board_wakeup_permitted(void)
return !is_bad_wake; return !is_bad_wake;
} }
/*
* TODO(sjg@chromium.org):
* Declared there here for SPL, since there is no core i2c subsystem and
* cmd_i2c.c is not included.
*/
void board_i2c_release_bus(int node)
{
}
int board_i2c_claim_bus(int node)
{
/* EC is not allowed to touch the bus until we enter U-Boot */
return 0;
}