soc/mediatek/mt8186: Complete DEVAPC settings

In the previous patch (CB:60317), only basic settings were added. Now
complete DEVPAC settings on MT8186.

1. Update permission setting
2. Update master domain setting:
  - domain 4: SCP
  - domain 5: SPM
3. Set domain remap
  - MMSYS (4-bit to 2-bit)

TEST=test on kernel correctly.
BUG=b:204229221

Signed-off-by: Runyang Chen <runyang.chen@mediatek.corp-partner.google.com>
Change-Id: I40a9b115fb21b6b955fde358241f4483b85e3db3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67433
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Runyang Chen 2022-08-11 15:54:21 +08:00 committed by Felix Held
parent a292f41fae
commit 23a6d6c7e7
2 changed files with 399 additions and 375 deletions

File diff suppressed because it is too large Load Diff

View File

@ -15,6 +15,8 @@ enum devapc_ao_offset {
DOM_REMAP_0_0 = 0xD00,
DOM_REMAP_1_0 = 0xD04,
MAS_DOM_0 = 0x0A00,
MAS_DOM_1 = 0x0A04,
MAS_DOM_3 = 0x0A0C,
MAS_SEC_0 = 0x0B00,
AO_APC_CON = 0x0F00,
};
@ -58,5 +60,15 @@ enum devapc_cfg_index {
* Bit Field DEFINITION
******************************************************************************/
DEFINE_BIT(SCP_SSPM_SEC, 21)
DEFINE_BITFIELD(SPM_DOM, 11, 8)
DEFINE_BITFIELD(SCP_DOM, 3, 0)
/* Domain Remap */
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1, 3, 2)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2, 5, 4)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3, 7, 6)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_4, 9, 8)
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_5, 11, 10)
#endif