mb/google/skyrim/var/frostflow: Update the STT settings

According to file thermal_table_0310, adjust the STT settings.

BRANCH=none
BUG=b:257149501
TEST=emerge-skyrim coreboot chromeos-bootimage
Then the thermal team has verified.

Change-Id: If4500c85dcea051aca15602f1fb4b5ec80b73e67
Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73698
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Tim Van Patten <timvp@google.com>
Reviewed-by: Chao Gui <chaogui@google.com>
This commit is contained in:
Frank Wu 2023-03-13 10:14:55 +08:00 committed by Eric Lai
parent 48286abfc1
commit 23c77ef0c3
1 changed files with 8 additions and 8 deletions

View File

@ -153,16 +153,16 @@ chip soc/amd/mendocino
# STT settings
register "stt_control" = "1"
register "stt_pcb_sensor_count" = "2"
register "stt_error_coeff" = "0x21"
register "stt_error_rate_coefficient" = "0x2666"
register "stt_min_limit" = "15000"
register "stt_skin_temp_apu" = "0x3000"
register "stt_error_coeff" = "0x38"
register "stt_error_rate_coefficient" = "0xbfb"
register "stt_min_limit" = "15500"
register "stt_skin_temp_apu" = "0x2b33"
# STT default mode
register "stt_m1" = "0xfed2"
register "stt_m2" = "0x5f9"
register "stt_c_apu" = "0xfbf8"
register "stt_alpha_apu" = "0x4ccd"
register "stt_m1" = "0x20c"
register "stt_m2" = "0x302"
register "stt_c_apu" = "0xf7e9"
register "stt_alpha_apu" = "0x199a"
# STT tablet mode
register "stt_m1_tablet" = "0x208"