soc/intel/common/block: Add Intel XDCI code support

XDCI MMIO offsets definitions are not alike between
various SoCs hence provided "soc_xdci_init" function
to implement SoC specific initialization.

Change-Id: I9cbc686a00c26b92be2847b6bd6c2e5aa5a690f7
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/19428
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Subrata Banik 2017-04-24 11:28:40 +05:30 committed by Martin Roth
parent 73b1797378
commit 23ccb0de3c
4 changed files with 69 additions and 0 deletions

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/*
* This file is part of the coreboot project.
*
* Copyright 2017 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef SOC_INTEL_COMMON_BLOCK_XDCI_H
#define SOC_INTEL_COMMON_BLOCK_XDCI_H
void soc_xdci_init(struct device *dev);
#endif /* SOC_INTEL_COMMON_BLOCK_XDCI_H */

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config SOC_INTEL_COMMON_BLOCK_XDCI
bool
help
Intel Processor common XDCI support

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ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI) += xdci.c

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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
* Copyright (C) 2015-2017 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <intelblocks/xdci.h>
__attribute__((weak)) void soc_xdci_init(struct device *dev) { /* no-op */ }
static struct device_operations usb_xdci_ops = {
.read_resources = &pci_dev_read_resources,
.set_resources = &pci_dev_set_resources,
.enable_resources = &pci_dev_enable_resources,
.init = soc_xdci_init,
};
static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_APOLLOLAKE_XDCI,
PCI_DEVICE_ID_INTEL_GLK_XDCI,
PCI_DEVICE_ID_INTEL_SPT_LP_XDCI,
0
};
static const struct pci_driver pch_usb_xdci __pci_driver = {
.ops = &usb_xdci_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.devices = pci_device_ids,
};