From 23e3f9d6ed4f841f0c5222a2aa2cb586f2210d95 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 3 Feb 2020 21:07:19 +0100 Subject: [PATCH] src/commonlib: Fix typos Change-Id: Ida1770c5e4b18c536e4943eb9cf862d69196c589 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/38689 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/commonlib/cbfs.c | 2 +- src/commonlib/include/commonlib/storage.h | 2 +- src/commonlib/storage/sd.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/commonlib/cbfs.c b/src/commonlib/cbfs.c index 5c9aacba20..be0de9f6aa 100644 --- a/src/commonlib/cbfs.c +++ b/src/commonlib/cbfs.c @@ -44,7 +44,7 @@ static size_t cbfs_next_offset(const struct region_device *cbfs, if (f == NULL) return 0; - /* The region_device objects store absolute offets over the whole + /* The region_device objects store absolute offsets over the whole * region. Therefore a relative offset needs to be calculated. */ offset = rdev_relative_offset(cbfs, &f->data); offset += region_device_sz(&f->data); diff --git a/src/commonlib/include/commonlib/storage.h b/src/commonlib/include/commonlib/storage.h index 47a2bb6543..faba2fe5a9 100644 --- a/src/commonlib/include/commonlib/storage.h +++ b/src/commonlib/include/commonlib/storage.h @@ -57,7 +57,7 @@ #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ #define EXT_CSD_BUS_WIDTH_STROBE (1<<7) /* Enhanced strobe mode */ -#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */ +#define EXT_CSD_TIMING_BC 0 /* Backwards compatibility */ #define EXT_CSD_TIMING_HS 1 /* High speed */ #define EXT_CSD_TIMING_HS200 2 /* HS200 */ #define EXT_CSD_TIMING_HS400 3 /* HS400 */ diff --git a/src/commonlib/storage/sd.c b/src/commonlib/storage/sd.c index bdb0baa2e4..30af81088d 100644 --- a/src/commonlib/storage/sd.c +++ b/src/commonlib/storage/sd.c @@ -220,7 +220,7 @@ int sd_change_freq(struct storage_media *media) if (!((ctrlr->caps & DRVR_CAP_HS52) && (ctrlr->caps & DRVR_CAP_HS))) goto out; - /* Give the card time to recover afer the switch operation. Wait for + /* Give the card time to recover after the switch operation. Wait for * 9 (>= 8) clock cycles receiving the switch status. */ delay = (9000000 + ctrlr->bus_hz - 1) / ctrlr->bus_hz;