haswell: enable ROM caching

If ROM caching is selected the haswell CPU initialization code
will enable ROM caching after all other CPU threads are brought
up.

Change-Id: I75424bb75174bfeca001468c3272e6375e925122
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/3016
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/cpu/intel/haswell/haswell_init.c

@@ -551,6 +551,9 @@ void bsp_init_and_start_aps(struct bus *cpu_bus)
 
 	/* After SMM relocation a 2nd microcode load is required. */
 	intel_microcode_load_unlocked(microcode_patch);
+
+	/* Enable ROM caching if option was selected. */
+	x86_mtrr_enable_rom_caching();
 }
 
 static struct device_operations cpu_dev_ops = {