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haswell: enable ROM caching 

If ROM caching is selected the haswell CPU initialization code
will enable ROM caching after all other CPU threads are brought
up.

Change-Id: I75424bb75174bfeca001468c3272e6375e925122
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/3016
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Aaron Durbin 2013-04-03 09:55:22 -05:00 committed by Stefan Reinauer
parent 13cc952a13
commit 23f50166c6
1 changed files with 3 additions and 0 deletions
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3
src/cpu/intel/haswell/haswell_init.c
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@ -551,6 +551,9 @@ void bsp_init_and_start_aps(struct bus *cpu_bus)
/* After SMM relocation a 2nd microcode load is required. */ /* After SMM relocation a 2nd microcode load is required. */
intel_microcode_load_unlocked(microcode_patch); intel_microcode_load_unlocked(microcode_patch);
/* Enable ROM caching if option was selected. */
x86_mtrr_enable_rom_caching();
} }
static struct device_operations cpu_dev_ops = { static struct device_operations cpu_dev_ops = {