Add TI PCI 7412 support.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>

Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5556 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-05-16 13:07:59 +00:00 committed by Stefan Reinauer
parent 96d8fef5d2
commit 23f703464a
6 changed files with 148 additions and 0 deletions

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@ -18,3 +18,4 @@
##
source src/southbridge/ti/pci7420/Kconfig
source src/southbridge/ti/pcixx12/Kconfig

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##
subdirs-$(CONFIG_SOUTHBRIDGE_TI_PCI7420) += pci7420
subdirs-$(CONFIG_SOUTHBRIDGE_TI_PCIXX12) += pcixx12

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##
## This file is part of the coreboot project.
##
## Copyright (C) 2008-2009 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config SOUTHBRIDGE_TI_PCIXX12
bool

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##
## This file is part of the coreboot project.
##
## Copyright (C) 2008-2009 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
driver-y += pcixx12.o

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/*
* This file is part of the coreboot project.
*
* (C) Copyright 2008 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef _SOUTHBRIDGE_TI_PCIXX12
#define _SOUTHBRIDGE_TI_PCIXX12
extern struct chip_operations southbridge_ti_pcixx12_ops;
struct southbridge_ti_pcixx12_config {
int dummy;
};
#endif /* _SOUTHBRIDGE_TI_PCIXX12 */

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/*
* This file is part of the coreboot project.
*
* (C) Copyright 2008 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include <device/cardbus.h>
#include "chip.h"
static void pcixx12_init(device_t dev)
{
/* cardbus controller function 1 for CF Socket */
printk(BIOS_DEBUG, "TI PCIxx12 init\n");
}
static void pcixx12_read_resources(device_t dev)
{
cardbus_read_resources(dev);
}
static void pcixx12_set_resources(device_t dev)
{
printk(BIOS_DEBUG, "%s In set resources \n",dev_path(dev));
pci_dev_set_resources(dev);
printk(BIOS_DEBUG, "%s done set resources \n",dev_path(dev));
}
static struct device_operations ti_pcixx12_ops = {
.read_resources = pcixx12_read_resources,
.set_resources = pcixx12_set_resources,
.enable_resources = cardbus_enable_resources,
.init = pcixx12_init,
.scan_bus = cardbus_scan_bridge,
};
static const struct pci_driver ti_pcixx12_driver __pci_driver = {
.ops = &ti_pcixx12_ops,
.vendor = 0x104c,
.device = 0x8039,
};
static void southbridge_init(device_t dev)
{
// struct southbridge_ti_pcixx12_config *config = dev->chip_info;
}
struct chip_operations southbridge_ti_pcixx12_ops = {
CHIP_NAME("Texas Instruments PCIxx12 Cardbus Controller")
.enable_dev = southbridge_init,
};