Add TI PCI 7412 support.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5556 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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##
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source src/southbridge/ti/pci7420/Kconfig
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source src/southbridge/ti/pcixx12/Kconfig
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##
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subdirs-$(CONFIG_SOUTHBRIDGE_TI_PCI7420) += pci7420
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subdirs-$(CONFIG_SOUTHBRIDGE_TI_PCIXX12) += pcixx12
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2008-2009 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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config SOUTHBRIDGE_TI_PCIXX12
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bool
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2008-2009 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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driver-y += pcixx12.o
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/*
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* This file is part of the coreboot project.
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*
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* (C) Copyright 2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#ifndef _SOUTHBRIDGE_TI_PCIXX12
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#define _SOUTHBRIDGE_TI_PCIXX12
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extern struct chip_operations southbridge_ti_pcixx12_ops;
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struct southbridge_ti_pcixx12_config {
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int dummy;
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};
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#endif /* _SOUTHBRIDGE_TI_PCIXX12 */
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/*
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* This file is part of the coreboot project.
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*
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* (C) Copyright 2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ops.h>
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#include <device/pci_ids.h>
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#include <console/console.h>
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#include <device/cardbus.h>
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#include "chip.h"
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static void pcixx12_init(device_t dev)
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{
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/* cardbus controller function 1 for CF Socket */
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printk(BIOS_DEBUG, "TI PCIxx12 init\n");
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}
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static void pcixx12_read_resources(device_t dev)
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{
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cardbus_read_resources(dev);
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}
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static void pcixx12_set_resources(device_t dev)
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{
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printk(BIOS_DEBUG, "%s In set resources \n",dev_path(dev));
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pci_dev_set_resources(dev);
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printk(BIOS_DEBUG, "%s done set resources \n",dev_path(dev));
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}
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static struct device_operations ti_pcixx12_ops = {
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.read_resources = pcixx12_read_resources,
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.set_resources = pcixx12_set_resources,
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.enable_resources = cardbus_enable_resources,
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.init = pcixx12_init,
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.scan_bus = cardbus_scan_bridge,
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};
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static const struct pci_driver ti_pcixx12_driver __pci_driver = {
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.ops = &ti_pcixx12_ops,
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.vendor = 0x104c,
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.device = 0x8039,
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};
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static void southbridge_init(device_t dev)
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{
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// struct southbridge_ti_pcixx12_config *config = dev->chip_info;
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}
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struct chip_operations southbridge_ti_pcixx12_ops = {
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CHIP_NAME("Texas Instruments PCIxx12 Cardbus Controller")
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.enable_dev = southbridge_init,
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};
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