GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ACPI: Make FADT entries for RTC/CMOS architectural 

For AMD, replace name RTC_ALT_CENTURY with RTC_CLK_ALTCENTURY
that points to same offset. Since the century field inside
RTC falls within the NVRAM space, and could interfere with
OPTION_TABLE, it is now guarded with config USE_PC_CMOS_ALTCENTURY.

There were no reference for the use of offset 0x48 for century.

Change-Id: I965a83dc8daaa02ad0935bdde5ca50110adb014a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74601
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kyösti Mälkki 2023-04-17 15:20:40 +03:00 committed by Felix Held
parent 097f540460
commit 240baa31e8
29 changed files with 18 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/acpi/acpi.c
View File

@ -1748,9 +1748,6 @@ static void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
fadt->preferred_pm_profile = acpi_get_preferred_pm_profile();
if (CONFIG(USE_PC_CMOS_ALTCENTURY))
fadt->century = RTC_CLK_ALTCENTURY;
fadt->sci_int = acpi_sci_int();
arch_fill_fadt(fadt);

11
src/arch/x86/acpi.c
View File

@ -3,6 +3,7 @@
#include <acpi/acpi.h>
#include <cf9_reset.h>
#include <cpu/x86/smm.h>
#include <pc80/mc146818rtc.h>
void arch_fill_fadt(acpi_fadt_t *fadt)
{
@ -24,4 +25,14 @@ void arch_fill_fadt(acpi_fadt_t *fadt)
fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
}
if (CONFIG(PC80_SYSTEM)) {
/* Currently these are defined to support date alarm only. */
fadt->day_alrm = RTC_DATE_ALARM;
fadt->mon_alrm = RTC_MONTH_ALARM;
}
/* Careful with USE_OPTION_TABLE. */
if (CONFIG(USE_PC_CMOS_ALTCENTURY))
fadt->century = RTC_CLK_ALTCENTURY;
}

3
src/include/pc80/mc146818rtc.h
View File

@ -93,6 +93,9 @@
#define RTC_CLK_YEAR 9
#define RTC_CLK_ALTCENTURY 0x32
#define RTC_DATE_ALARM RTC_REG_D
#define RTC_MONTH_ALARM 0
/* On PCs, the checksum is built only over bytes 16..45 */
#define PC_CKS_RANGE_START 16
#define PC_CKS_RANGE_END 45

2
src/soc/amd/cezanne/acpi.c
View File

@ -50,8 +50,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
fadt->day_alrm = RTC_DATE_ALARM;
fadt->century = RTC_ALT_CENTURY;
fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */
fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */
ACPI_FADT_C1_SUPPORTED |

5
src/soc/amd/cezanne/include/soc/acpi.h
View File

@ -10,11 +10,6 @@
#define ACPI_SCI_IRQ 9
/* RTC Registers */
#define RTC_DATE_ALARM 0x0d
#define RTC_ALT_CENTURY 0x32
#define RTC_CENTURY 0x48
uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
acpi_rsdp_t *rsdp);

2
src/soc/amd/glinda/acpi.c
View File

@ -52,8 +52,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
fadt->day_alrm = RTC_DATE_ALARM;
fadt->century = RTC_ALT_CENTURY;
fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */
fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */
ACPI_FADT_C1_SUPPORTED |

5
src/soc/amd/glinda/include/soc/acpi.h
View File

@ -12,11 +12,6 @@
#define ACPI_SCI_IRQ 9
/* RTC Registers */
#define RTC_DATE_ALARM 0x0d
#define RTC_ALT_CENTURY 0x32
#define RTC_CENTURY 0x48
uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
acpi_rsdp_t *rsdp);

2
src/soc/amd/mendocino/acpi.c
View File

@ -51,8 +51,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
fadt->day_alrm = RTC_DATE_ALARM;
fadt->century = RTC_ALT_CENTURY;
fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */
fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */
ACPI_FADT_C1_SUPPORTED |

5
src/soc/amd/mendocino/include/soc/acpi.h
View File

@ -10,11 +10,6 @@
#define ACPI_SCI_IRQ 9
/* RTC Registers */
#define RTC_DATE_ALARM 0x0d
#define RTC_ALT_CENTURY 0x32
#define RTC_CENTURY 0x48
uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
acpi_rsdp_t *rsdp);

2
src/soc/amd/phoenix/acpi.c
View File

@ -52,8 +52,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
fadt->day_alrm = RTC_DATE_ALARM;
fadt->century = RTC_ALT_CENTURY;
fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */
fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */
ACPI_FADT_C1_SUPPORTED |

5
src/soc/amd/phoenix/include/soc/acpi.h
View File

@ -12,11 +12,6 @@
#define ACPI_SCI_IRQ 9
/* RTC Registers */
#define RTC_DATE_ALARM 0x0d
#define RTC_ALT_CENTURY 0x32
#define RTC_CENTURY 0x48
uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
acpi_rsdp_t *rsdp);

1
src/soc/amd/picasso/acpi.c
View File

@ -56,7 +56,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
fadt->day_alrm = RTC_DATE_ALARM;
fadt->iapc_boot_arch = cfg->fadt_boot_arch; /* legacy free default */
fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */
ACPI_FADT_C1_SUPPORTED |

3
src/soc/amd/picasso/include/soc/acpi.h
View File

@ -10,9 +10,6 @@
#define ACPI_SCI_IRQ 9
/* RTC Registers */
#define RTC_DATE_ALARM 0x0d
uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
acpi_rsdp_t *rsdp);

1
src/soc/amd/stoneyridge/acpi.c
View File

@ -54,7 +54,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */
fadt->duty_width = 3; /* CLK_VAL bits 3:1 */
fadt->day_alrm = RTC_DATE_ALARM;
fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */
fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */
ACPI_FADT_C1_SUPPORTED |

3
src/soc/amd/stoneyridge/include/soc/acpi.h
View File

@ -14,9 +14,6 @@
#define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042)
#endif
/* RTC Registers */
#define RTC_DATE_ALARM 0x0d
const char *soc_acpi_name(const struct device *dev);
#endif /* AMD_STONEYRIDGE_ACPI_H */

2
src/soc/intel/baytrail/fadt.c
View File

@ -22,8 +22,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->pm2_cnt_len = 1;
fadt->pm_tmr_len = 4;
fadt->gpe0_blk_len = 2 * (GPE0_EN - GPE0_STS);
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |

2
src/soc/intel/braswell/fadt.c
View File

@ -23,8 +23,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->pm2_cnt_len = 1;
fadt->pm_tmr_len = 4;
fadt->gpe0_blk_len = 2 * (GPE0_EN - GPE0_STS);
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |

2
src/soc/intel/broadwell/pch/fadt.c
View File

@ -22,8 +22,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->pm2_cnt_len = 1;
fadt->pm_tmr_len = 4;
fadt->gpe0_blk_len = 32;
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD |

1
src/soc/intel/common/block/acpi/acpi.c
View File

@ -106,7 +106,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
/* GPE0 STS/EN pairs each 32 bits wide. */
fadt->gpe0_blk_len = 2 * GPE0_REG_MAX * sizeof(uint32_t);
fadt->day_alrm = 0xd;
fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
ACPI_FADT_SLEEP_BUTTON |

2
src/soc/intel/xeon_sp/skx/soc_acpi.c
View File

@ -47,8 +47,6 @@ void soc_fill_fadt(acpi_fadt_t *fadt)
fadt->pm2_cnt_len = 1;
fadt->pm_tmr_len = 4;
/* RTC Registers */
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
/* PM2 Control Registers */

2
src/southbridge/amd/pi/hudson/fadt.c
View File

@ -38,8 +38,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */
fadt->duty_width = 3; /* CLK_VAL bits 3:1 */
fadt->day_alrm = 0; /* 0x7d these have to be */
fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */
fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */
fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */
fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */

2
src/southbridge/intel/bd82x6x/fadt.c
View File

@ -25,8 +25,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->pm_tmr_len = 4;
fadt->gpe0_blk_len = 16;
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD |

3
src/southbridge/intel/i82371eb/fadt.c
View File

@ -31,8 +31,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->duty_offset = 1; /* bit 1:3 in PCNTRL reg (pmbase+0x10) */
fadt->duty_width = 3; /* this width is in bits */
fadt->day_alrm = 0x0d; /* rtc CMOS RAM offset */
fadt->mon_alrm = 0x0; /* not supported */
/*
* bit meaning
* 0 1: We have user-visible legacy devices

2
src/southbridge/intel/i82801dx/fadt.c
View File

@ -19,8 +19,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->pm_tmr_len = 4;
fadt->gpe0_blk_len = 8;
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |

3
src/southbridge/intel/i82801gx/fadt.c
View File

@ -33,8 +33,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->duty_width = 3;
else
fadt->duty_width = 0;
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES;
fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED
| ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE

3
src/southbridge/intel/i82801ix/fadt.c
View File

@ -26,8 +26,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->p_lvl3_lat = 0x39;
fadt->duty_offset = 1;
fadt->duty_width = 3;
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_FREE;
fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |

3
src/southbridge/intel/i82801jx/fadt.c
View File

@ -26,8 +26,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->p_lvl3_lat = 0; /* FIXME: Is this correct? */
fadt->duty_offset = 1;
fadt->duty_width = 0;
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES;
fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED
| ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE

2
src/southbridge/intel/ibexpeak/fadt.c
View File

@ -25,8 +25,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->pm_tmr_len = 4;
fadt->gpe0_blk_len = 16;
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD |

2
src/southbridge/intel/lynxpoint/fadt.c
View File

@ -37,8 +37,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
else
fadt->gpe0_blk_len = 2 * 8;
fadt->day_alrm = 0xd;
fadt->mon_alrm = 0x00;
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD |