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reef: tune tpm i2c frequency to 400kHz 

This brings the frequency down to 400kHz which is spec for
fast i2c.

BUG=chrome-os-partner:58889

Change-Id: I8689a062b5457aa431eaa7fb688a7170dad83fcf
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17214
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Aaron Durbin 2016-11-03 08:34:23 -05:00
parent 46575fb1d4
commit 242cb3b601
1 changed files with 12 additions and 2 deletions
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14
src/mainboard/google/reef/variants/baseboard/devicetree.cb
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@ -71,8 +71,18 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_63_32"
register "gpe0_dw3" = "PMC_GPE_SW_31_0"
# Enable I2C2 bus early for TPM access
register "i2c[2].early_init" = "1"
# Enable I2C2 bus early for TPM access and configure as 400kHz
# with manually tuned values.
register "i2c[2]" = "{
.early_init = 1,
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 0xd0,
.scl_hcnt = 0x68,
.sda_hold = 0x27,
}
}"
# Minimum SLP S3 assertion width 28ms.
register "slp_s3_assertion_width_usecs" = "28000"