cpu: get rid of socket source code
None of the sockets has actual configuration options, so the source for them is only cosmetical boilerplate. Hence, drop it. This reduces the sockets to be selectors for certain CPU types, which will be dropped in future commits, and mainboards will select their CPUs directly rather than through an additional layer of indirection (sockets) Change-Id: I0f52a65838875a73531ef8c92a171bb1a35be96e Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/9797 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
This commit is contained in:
parent
99cc1aacc6
commit
2436bda11d
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@ -1,4 +1,3 @@
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ramstage-y += socket_754.c
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subdirs-y += ../model_fxx
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subdirs-y += ../dualcore
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subdirs-y += ../mtrr
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@ -1,6 +0,0 @@
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_754_ops = {
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CHIP_NAME("Socket 754 CPU")
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};
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@ -1,4 +1,3 @@
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ramstage-y += socket_939.c
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subdirs-y += ../model_fxx
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subdirs-y += ../dualcore
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subdirs-y += ../mtrr
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@ -1,5 +0,0 @@
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_939_ops = {
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CHIP_NAME("Socket 939 CPU")
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};
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@ -1,4 +1,3 @@
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ramstage-y += socket_940.c
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subdirs-y += ../model_fxx
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subdirs-y += ../dualcore
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subdirs-y += ../mtrr
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@ -1,5 +0,0 @@
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_940_ops = {
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CHIP_NAME("Socket 940 CPU")
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};
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@ -1,4 +1,3 @@
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ramstage-y += socket_AM2.c
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subdirs-y += ../model_fxx
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subdirs-y += ../dualcore
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subdirs-y += ../mtrr
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@ -1,5 +0,0 @@
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_AM2_ops = {
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CHIP_NAME("Socket AM2 CPU")
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};
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@ -1,4 +1,3 @@
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ramstage-y += socket_AM2r2.c
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subdirs-y += ../model_10xxx
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subdirs-y += ../quadcore
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subdirs-y += ../mtrr
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@ -1,24 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_AM2r2_ops = {
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CHIP_NAME("socket AM2r2")
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};
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@ -1,4 +1,3 @@
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ramstage-y += socket_AM3.c
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subdirs-y += ../model_10xxx
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subdirs-y += ../quadcore
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subdirs-y += ../mtrr
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@ -1,24 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_AM3_ops = {
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CHIP_NAME("socket AM3")
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};
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@ -1,4 +1,3 @@
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ramstage-y += socket_ASB2.c
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subdirs-y += ../model_10xxx
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subdirs-y += ../quadcore
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subdirs-y += ../mtrr
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@ -1,24 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_ASB2_ops = {
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CHIP_NAME("socket ASB2")
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};
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@ -1,4 +1,3 @@
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ramstage-y += socket_C32.c
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subdirs-y += ../model_10xxx
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subdirs-y += ../quadcore
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subdirs-y += ../mtrr
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@ -1,24 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_C32_ops = {
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CHIP_NAME("socket C32")
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};
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@ -1,4 +1,3 @@
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ramstage-y += socket_F.c
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subdirs-y += ../model_fxx
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subdirs-y += ../dualcore
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subdirs-y += ../mtrr
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@ -1,5 +0,0 @@
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_F_ops = {
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CHIP_NAME("Socket F CPU")
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};
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ramstage-y += socket_F_1207.c
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subdirs-y += ../model_10xxx
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subdirs-y += ../quadcore
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subdirs-y += ../mtrr
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_F_1207_ops = {
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CHIP_NAME("socket F_1207")
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};
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@ -1,4 +1,3 @@
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ramstage-y += socket_S1G1.c
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subdirs-y += ../model_fxx
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subdirs-y += ../dualcore
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subdirs-y += ../mtrr
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#include <device/device.h>
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struct chip_operations cpu_amd_socket_S1G1_ops = {
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CHIP_NAME("Socket S1G1 CPU")
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};
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ramstage-y += socket_441.c
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subdirs-y += ../model_106cx
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_441_ops = {
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CHIP_NAME("Socket 441 CPU")
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};
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ramstage-y += socket_BGA956.c
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subdirs-y += ../model_1067x
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_BGA956_ops = {
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CHIP_NAME("Socket BGA956 CPU")
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};
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ramstage-y += socket_FC_PGA370.c
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subdirs-y += ../model_68x
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Joseph Smith <joe@settoplinux.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_FC_PGA370_ops = {
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CHIP_NAME("(FC)PGA370 CPU")
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};
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ramstage-y += socket_LGA1155.c
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/lapic
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subdirs-y += ../../x86/cache
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_LGA1155_ops = {
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CHIP_NAME("Socket LGA1155 CPU")
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};
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ramstage-y += socket_LGA771.c
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subdirs-y += ../model_6ex
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subdirs-y += ../model_6fx
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subdirs-y += ../../x86/tsc
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_LGA771_ops = {
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CHIP_NAME("Socket LGA771 CPU")
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};
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ramstage-y += socket_LGA775.c
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subdirs-y += ../model_6ex
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subdirs-y += ../model_6fx
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subdirs-y += ../model_f3x
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_LGA775_ops = {
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CHIP_NAME("Socket LGA775 CPU")
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};
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ramstage-y += socket_PGA370.c
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subdirs-y += ../model_6xx
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_PGA370_ops = {
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CHIP_NAME("Socket PGA370 CPU")
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};
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ramstage-y += socket_mFCBGA479.c
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subdirs-y += ../model_6bx
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_mFCBGA479_ops = {
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CHIP_NAME("Micro-FCBGA 479 CPU")
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};
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ramstage-y += socket_mFCPGA478.c
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subdirs-y += ../model_69x
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subdirs-y += ../model_6dx
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subdirs-y += ../model_6ex
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_mFCPGA478_ops = {
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CHIP_NAME("Socket mFCPGA478 CPU")
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};
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ramstage-y += socket_mPGA478.c
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subdirs-y += ../model_69x
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subdirs-y += ../model_6dx
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subdirs-y += ../../x86/tsc
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_mPGA478_ops = {
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CHIP_NAME("Socket mPGA478 CPU")
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};
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ramstage-y += socket_mPGA479M.c
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subdirs-y += ../model_69x
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subdirs-y += ../model_6dx
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subdirs-y += ../model_f2x
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_mPGA479M_ops = {
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CHIP_NAME("Socket mPGA479M CPU")
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};
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ramstage-y += socket_mPGA603_400Mhz.c
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subdirs-y += ../model_f0x
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subdirs-y += ../model_f1x
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subdirs-y += ../model_f2x
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_mPGA603_ops = {
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CHIP_NAME("Socket mPGA603 400Mhz CPU")
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};
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ramstage-y += socket_mPGA604.c
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subdirs-y += ../model_f2x
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subdirs-y += ../model_f3x
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subdirs-y += ../model_f4x
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_mPGA604_ops = {
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CHIP_NAME("Socket mPGA604 CPU")
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};
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ramstage-y += socket_rPGA988B.c
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/lapic
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_rPGA988B_ops = {
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CHIP_NAME("Socket rPGA988B CPU")
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};
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ramstage-y += socket_rPGA989.c
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/lapic
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#include <device/device.h>
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struct chip_operations cpu_intel_socket_rPGA989_ops = {
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CHIP_NAME("Socket rPGA989 CPU")
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};
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