treewide: Fix old-style declarations
Replace old style declaration "const static" with "static const". This to enable "Wold-style-declaration" command option. Change-Id: I757632befed1854f422daaf4dfea58281b16e2f5 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71841 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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@ -25,7 +25,7 @@
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/* Signature "MRCD" was used for older header format before CB:67670. */
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#define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('d'<<24))
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const static uint32_t mrc_invalid_sig = ~MRC_DATA_SIGNATURE;
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static const uint32_t mrc_invalid_sig = ~MRC_DATA_SIGNATURE;
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struct mrc_metadata {
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uint32_t signature;
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@ -12,7 +12,7 @@ typedef struct {
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const char *name;
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} sku_info;
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const static sku_info skus[] = {
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static const sku_info skus[] = {
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// Drallion 360
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{ .id = 1, .name = "sku1" },
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// Drallion
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@ -56,7 +56,7 @@ const struct region_device *boot_device_ro(void)
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return NULL;
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}
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const static struct fu540_spi_mmap_config spi_mmap_config = {
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static const struct fu540_spi_mmap_config spi_mmap_config = {
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.cmd_en = 1,
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.addr_len = 4,
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.pad_cnt = 6,
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@ -23,7 +23,7 @@
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*
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* TODO: Find out which I2C controllers we really need to enable here.
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*/
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const static unsigned int aoac_devs[] = {
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static const unsigned int aoac_devs[] = {
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FCH_AOAC_DEV_AMBA,
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FCH_AOAC_DEV_I2C0,
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FCH_AOAC_DEV_I2C1,
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@ -29,7 +29,7 @@
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* amd_pci_int_defs.h, just add the pair at the end of this table.
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* Order is not important.
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*/
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const static struct irq_idx_name irq_association[] = {
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static const struct irq_idx_name irq_association[] = {
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{ PIRQ_A, "INTA#" },
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{ PIRQ_B, "INTB#" },
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{ PIRQ_C, "INTC#" },
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@ -28,7 +28,7 @@
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*
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* TODO: Find out which I2C controllers we really need to enable here.
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*/
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const static unsigned int aoac_devs[] = {
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static const unsigned int aoac_devs[] = {
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FCH_AOAC_DEV_AMBA,
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FCH_AOAC_DEV_I2C0,
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FCH_AOAC_DEV_I2C1,
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@ -25,7 +25,7 @@
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* amd_pci_int_defs.h, just add the pair at the end of this table.
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* Order is not important.
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*/
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const static struct irq_idx_name irq_association[] = {
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static const struct irq_idx_name irq_association[] = {
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{ PIRQ_A, "INTA#" },
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{ PIRQ_B, "INTB#" },
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{ PIRQ_C, "INTC#" },
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@ -26,7 +26,7 @@
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*
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* TODO: Find out which I2C controllers we really need to enable here.
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*/
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const static unsigned int aoac_devs[] = {
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static const unsigned int aoac_devs[] = {
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FCH_AOAC_DEV_AMBA,
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FCH_AOAC_DEV_I2C0,
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FCH_AOAC_DEV_I2C1,
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@ -24,7 +24,7 @@
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* amd_pci_int_defs.h, just add the pair at the end of this table.
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* Order is not important.
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*/
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const static struct irq_idx_name irq_association[] = {
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static const struct irq_idx_name irq_association[] = {
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{ PIRQ_A, "INTA#" },
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{ PIRQ_B, "INTB#" },
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{ PIRQ_C, "INTC#" },
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@ -26,7 +26,7 @@
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*
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* TODO: Find out which I2C controllers we really need to enable here.
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*/
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const static unsigned int aoac_devs[] = {
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static const unsigned int aoac_devs[] = {
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FCH_AOAC_DEV_AMBA,
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FCH_AOAC_DEV_I2C0,
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FCH_AOAC_DEV_I2C1,
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@ -24,7 +24,7 @@
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* amd_pci_int_defs.h, just add the pair at the end of this table.
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* Order is not important.
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*/
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const static struct irq_idx_name irq_association[] = {
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static const struct irq_idx_name irq_association[] = {
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{ PIRQ_A, "INTA#" },
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{ PIRQ_B, "INTB#" },
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{ PIRQ_C, "INTC#" },
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@ -23,7 +23,7 @@
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* waiting for each device to become available, a single delay will be
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* executed. The console UART is handled separately from this table.
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*/
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const static unsigned int aoac_devs[] = {
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static const unsigned int aoac_devs[] = {
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FCH_AOAC_DEV_AMBA,
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FCH_AOAC_DEV_I2C2,
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FCH_AOAC_DEV_I2C3,
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@ -31,7 +31,7 @@
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* amd_pci_int_defs.h, just add the pair at the end of this table.
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* Order is not important.
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*/
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const static struct irq_idx_name irq_association[] = {
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static const struct irq_idx_name irq_association[] = {
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{ PIRQ_A, "INTA#" },
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{ PIRQ_B, "INTB#" },
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{ PIRQ_C, "INTC#" },
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@ -92,7 +92,7 @@ static int sdmmc_cbfs_open(void)
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return 0;
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}
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const static struct mem_region_device alternate_rdev =
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static const struct mem_region_device alternate_rdev =
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MEM_REGION_DEV_RO_INIT(_cbfs_cache, REGION_SIZE(cbfs_cache));
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const struct region_device *boot_device_ro(void)
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@ -58,16 +58,16 @@ RDATA_GROUP (G1_PEICC)
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#define FILECODE LIB_AMDLIB_FILECODE
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BOOLEAN
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STATIC
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BOOLEAN
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GetPciMmioAddress (
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OUT UINT64 *MmioAddress,
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OUT UINT32 *MmioSize,
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IN AMD_CONFIG_PARAMS *StdHeader
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);
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VOID
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STATIC
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VOID
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LibAmdGetDataFromPtr (
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IN ACCESS_WIDTH AccessWidth,
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IN CONST VOID *Data,
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@ -150,8 +150,8 @@ WriteIo32 (
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__outdword (Address, Data);
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}
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AMDLIB_OPTIMIZE
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STATIC
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AMDLIB_OPTIMIZE
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UINT64 SetFsBase (
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UINT64 address
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)
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@ -163,8 +163,8 @@ UINT64 SetFsBase (
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return hwcr;
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}
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AMDLIB_OPTIMIZE
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STATIC
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AMDLIB_OPTIMIZE
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VOID
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RestoreHwcr (
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UINT64
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@ -961,8 +961,8 @@ LibAmdPciPoll (
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*
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* @retval TRUE MmioAddress/MmioSize are valid
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*/
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BOOLEAN
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STATIC
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BOOLEAN
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GetPciMmioAddress (
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OUT UINT64 *MmioAddress,
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OUT UINT32 *MmioSize,
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@ -1300,8 +1300,8 @@ LibAmdGetPackageType (
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* @param[out] TempDataMask typecast data
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*/
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VOID
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STATIC
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VOID
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LibAmdGetDataFromPtr (
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IN ACCESS_WIDTH AccessWidth,
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IN CONST VOID *Data,
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