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nb/intel/x4x: Fix booting with FSB800 DDR667 combination 

A small typo in the dll setting code prevented this combination from
booting.

TESTED on ga-g41m-es2l with 800MHz FSB CPU and 667MHz ddr2

Change-Id: Ib013471773c20336ba0902b7f328bfb6ef970747
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20981
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Arthur Heymans 2017-08-13 16:02:09 +02:00
parent 6d7a8c1125
commit 24798a1544
1 changed files with 1 additions and 1 deletions
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src/northbridge/intel/x4x/raminit_ddr2.c
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@ -927,7 +927,7 @@ static void dll_ddr2(struct sysinfo *s)
if ((s->selected_timings.fsb_clk == FSB_CLOCK_800MHz) &&
(s->selected_timings.mem_clk == MEM_CLOCK_667MHz)) {
i = MCHBAR8(0x180) & 0xf;
i = MCHBAR8(0x1c8) & 0xf;
i = (i + 10) % 14;
MCHBAR8(0x1c8) = (MCHBAR8(0x1c8) & ~0x1f) | i;
MCHBAR8(0x180) = MCHBAR8(0x180) | 0x10;