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mb/google/nightfury: Tune the usb2_port[0] strength 

Update usb2 port strength parameter for usb2_port[0] to improve SI.

BUG=b:154668734
BRANCH=firmware-hatch-12672.B
TEST=Built and checked SI margin of USB2 ports

Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Change-Id: I8b4b58a67dc0835a677770a2968e8d8d61e0374f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40622
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Seunghwan Kim 2020-04-23 14:04:38 +09:00 committed by Patrick Georgi
parent e0b7a88f58
commit 24a65f8019
1 changed files with 1 additions and 1 deletions
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src/mainboard/google/hatch/variants/nightfury/overridetree.cb
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@ -23,7 +23,7 @@ chip soc/intel/cannonlake
# Enable DMIC1 # Enable DMIC1
register "PchHdaAudioLinkDmic1" = "1" register "PchHdaAudioLinkDmic1" = "1"
register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)" # Type-C Port 0 register "usb2_ports[0]" = "USB2_PORT_SHORT(OC2)" # Type-C Port 0
register "usb2_ports[1]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1 register "usb2_ports[1]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1
register "usb2_ports[2]" = "USB2_PORT_EMPTY" register "usb2_ports[2]" = "USB2_PORT_EMPTY"
register "usb2_ports[3]" = "USB2_PORT_EMPTY" register "usb2_ports[3]" = "USB2_PORT_EMPTY"