diff --git a/src/soc/intel/apollolake/cse.c b/src/soc/intel/apollolake/cse.c index 6ee1a155ea..2445289385 100644 --- a/src/soc/intel/apollolake/cse.c +++ b/src/soc/intel/apollolake/cse.c @@ -36,9 +36,6 @@ #define READ_FILE_FLAG_EMULATED (1 << 2) #define READ_FILE_FLAG_HW (1 << 3) -#define MKHI_GROUP_ID_GEN 0xff -#define GET_FW_VERSION 0x02 - #define MCA_MAX_FILE_PATH_SIZE 64 #define FUSE_LOCK_FILE "/fpf/intel/SocCfgLock" @@ -180,59 +177,6 @@ static uint32_t dump_status(int index, int reg_addr) return reg; } -static void dump_cse_version(void *unused) -{ - int res; - size_t reply_size; - struct mkhi_hdr msg; - struct version { - uint16_t minor; - uint16_t major; - uint16_t build; - uint16_t hotfix; - } __packed; - - struct fw_version_response { - struct mkhi_hdr hdr; - struct version code; - struct version nftp; - struct version fitc; - } __packed rsp; - - /* - * Print ME version only if UART debugging is enabled. Else, it takes - * ~0.6 second to talk to ME and get this information. - */ - if (!CONFIG(CONSOLE_SERIAL)) - return; - - msg.group_id = MKHI_GROUP_ID_GEN; - msg.command = GET_FW_VERSION; - - res = heci_send(&msg, sizeof(msg), BIOS_HOST_ADDR, HECI_MKHI_ADDR); - - if (!res) { - printk(BIOS_ERR, "Failed to send HECI message.\n"); - return; - } - - reply_size = sizeof(rsp); - res = heci_receive(&rsp, &reply_size); - - if (!res) { - printk(BIOS_ERR, "Failed to receive HECI reply.\n"); - return; - } - - if (rsp.hdr.result != 0) { - printk(BIOS_ERR, "Failed to get ME version.\n"); - return; - } - - printk(BIOS_DEBUG, "ME: Version: %d.%d.%d.%d\n", rsp.code.major, - rsp.code.minor, rsp.code.hotfix, rsp.code.build); -} - static void dump_cse_state(void) { uint32_t fwsts1; @@ -289,4 +233,4 @@ void heci_cse_lockdown(void) } BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, fpf_blown, NULL); -BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, dump_cse_version, NULL); +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, print_me_fw_version, NULL); diff --git a/src/soc/intel/cannonlake/me.c b/src/soc/intel/cannonlake/me.c index 3d3fcb8ded..d41b0b8bc8 100644 --- a/src/soc/intel/cannonlake/me.c +++ b/src/soc/intel/cannonlake/me.c @@ -23,14 +23,6 @@ #include #include -/* Miscellaneous constants */ -enum { - MKHI_GEN_GROUP_ID = 0xFF, - MKHI_GET_FW_VERSION = 0x02, - ME_OPMODE_NORMAL = 0x00, - ME_WSTATE_NORMAL = 0x05, -}; - /* Host Firmware Status Register 2 */ union me_hfsts2 { uint32_t raw; @@ -115,76 +107,6 @@ union me_hfsts6 { } __packed fields; }; -/* - * From reading the documentation, this should work for both WHL and CML - * platforms. Also, calling this function from dump_me_status() does not - * work, as the ME does not respond and the command times out. - */ -static void print_me_version(void *unused) -{ - struct version { - uint16_t minor; - uint16_t major; - uint16_t build; - uint16_t hotfix; - } __packed; - - struct fw_ver_resp { - struct mkhi_hdr hdr; - struct version code; - struct version rec; - struct version fitc; - } __packed; - - union me_hfsts1 hfsts1; - const struct mkhi_hdr fw_ver_msg = { - .group_id = MKHI_GEN_GROUP_ID, - .command = MKHI_GET_FW_VERSION, - }; - struct fw_ver_resp resp; - size_t resp_size = sizeof(resp); - - /* Ignore if UART debugging is disabled */ - if (!CONFIG(CONSOLE_SERIAL)) - return; - - if (!is_cse_enabled()) - return; - - hfsts1.data = me_read_config32(PCI_ME_HFSTS1); - - /* - * Prerequisites: - * 1) HFSTS1 Current Working State is Normal - * 2) HFSTS1 Current Operation Mode is Normal - * 3) It's after DRAM INIT DONE message (taken care of by calling it - * during ramstage - */ - if ((hfsts1.fields.working_state != ME_WSTATE_NORMAL) || - (hfsts1.fields.operation_mode != ME_OPMODE_NORMAL)) - goto fail; - - heci_reset(); - - if (!heci_send(&fw_ver_msg, sizeof(fw_ver_msg), BIOS_HOST_ADDR, - HECI_MKHI_ADDR)) - goto fail; - - if (!heci_receive(&resp, &resp_size)) - goto fail; - - if (resp.hdr.result) - goto fail; - - printk(BIOS_DEBUG, "ME: Version: %d.%d.%d.%d\n", resp.code.major, - resp.code.minor, resp.code.hotfix, resp.code.build); - return; - -fail: - printk(BIOS_DEBUG, "ME: Version: Unavailable\n"); -} -BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_version, NULL); - void dump_me_status(void *unused) { union me_hfsts1 hfsts1; @@ -250,5 +172,5 @@ void dump_me_status(void *unused) printk(BIOS_DEBUG, "ME: TXT Support : %s\n", hfsts6.fields.txt_support ? "YES" : "NO"); } - +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_fw_version, NULL); BOOT_STATE_INIT_ENTRY(BS_OS_RESUME_CHECK, BS_ON_EXIT, dump_me_status, NULL); diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index b24a99a7f3..c9712dbb2c 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -754,6 +754,67 @@ int cse_hmrfpo_get_status(void) return resp.status; } +void print_me_fw_version(void *unused) +{ + struct version { + uint16_t minor; + uint16_t major; + uint16_t build; + uint16_t hotfix; + } __packed; + + struct fw_ver_resp { + struct mkhi_hdr hdr; + struct version code; + struct version rec; + struct version fitc; + } __packed; + + const struct mkhi_hdr fw_ver_msg = { + .group_id = MKHI_GROUP_ID_GEN, + .command = MKHI_GEN_GET_FW_VERSION, + }; + + struct fw_ver_resp resp; + size_t resp_size = sizeof(resp); + + /* Ignore if UART debugging is disabled */ + if (!CONFIG(CONSOLE_SERIAL)) + return; + + /* + * Ignore if ME Firmware SKU type is custom since + * print_boot_partition_info() logs RO(BP1) and RW(BP2) versions. + */ + if (cse_is_hfs3_fw_sku_custom()) + return; + + /* + * Prerequisites: + * 1) HFSTS1 Current Working State is Normal + * 2) HFSTS1 Current Operation Mode is Normal + * 3) It's after DRAM INIT DONE message (taken care of by calling it + * during ramstage + */ + if (!cse_is_hfs1_cws_normal() || !cse_is_hfs1_com_normal()) + goto fail; + + heci_reset(); + + if (!heci_send_receive(&fw_ver_msg, sizeof(fw_ver_msg), &resp, &resp_size)) + goto fail; + + if (resp.hdr.result) + goto fail; + + printk(BIOS_DEBUG, "ME: Version: %d.%d.%d.%d\n", resp.code.major, + resp.code.minor, resp.code.hotfix, resp.code.build); + return; + +fail: + printk(BIOS_DEBUG, "ME: Version: Unavailable\n"); +} + #if ENV_RAMSTAGE static void update_sec_bar(struct device *dev) diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 2b07092307..93d1ce1d04 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -22,6 +22,7 @@ /* MKHI Command groups */ #define MKHI_GROUP_ID_CBM 0x0 #define MKHI_GROUP_ID_HMRFPO 0x5 +#define MKHI_GROUP_ID_GEN 0xff /* Global Reset Command ID */ #define MKHI_CBM_GLOBAL_RESET_REQ 0xb @@ -33,6 +34,9 @@ #define MKHI_HMRFPO_ENABLE 0x1 #define MKHI_HMRFPO_GET_STATUS 0x3 +/* Get Firmware Version Command Id */ +#define MKHI_GEN_GET_FW_VERSION 0x2 + /* ME Current Working States */ #define ME_HFS1_CWS_NORMAL 0x5 @@ -163,6 +167,11 @@ int cse_hmrfpo_get_status(void); /* Host can access ME region */ #define MKHI_HMRFPO_ENABLED 2 +/* + * Queries and logs ME firmware version + */ +void print_me_fw_version(void *unused); + /* * Checks current working operation state is normal or not. * Returns true if CSE's current working state is normal, otherwise false. diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h index 332340f860..2f581fb3b8 100644 --- a/src/soc/intel/skylake/include/soc/me.h +++ b/src/soc/intel/skylake/include/soc/me.h @@ -192,10 +192,6 @@ union me_hfsts6 { } __packed fields; }; -#define MKHI_GEN_GROUP_ID 0xff - -#define MKHI_GET_FW_VERSION 0x02 - void intel_me_status(void); int send_global_reset(void); diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c index b45234ec65..45a7c485ea 100644 --- a/src/soc/intel/skylake/me.c +++ b/src/soc/intel/skylake/me.c @@ -196,80 +196,6 @@ static const char *const me_progress_bup_values[] = { "M0 kernel load", }; -static void print_me_version(void *unused) -{ - struct version { - uint16_t minor; - uint16_t major; - uint16_t build; - uint16_t hotfix; - } __packed; - - struct fw_ver_resp { - struct mkhi_hdr hdr; - struct version code; - struct version rec; - struct version fitc; - } __packed; - - const struct mkhi_hdr fw_ver_msg = { - .group_id = MKHI_GEN_GROUP_ID, - .command = MKHI_GET_FW_VERSION, - }; - - struct fw_ver_resp resp; - size_t resp_size = sizeof(resp); - union me_hfsts1 hfs1; - - /* - * Print ME version only if UART debugging is enabled. Else, it takes ~1 - * second to talk to ME and get this information. - */ - if (!CONFIG(CONSOLE_SERIAL)) - return; - - if (!is_cse_enabled()) - return; - - hfs1.data = me_read_config32(PCI_ME_HFSTS1); - /* - * This command can be run only if: - * - Working state is normal and - * - Operation mode is normal. - */ - if ((hfs1.fields.working_state != ME_HFS_CWS_NORMAL) || - (hfs1.fields.operation_mode != ME_HFS_MODE_NORMAL)) - goto failed; - - /* - * It is important to do a heci_reset to ensure BIOS and ME are in sync - * before reading firmware version. - */ - heci_reset(); - - if (!heci_send(&fw_ver_msg, sizeof(fw_ver_msg), BIOS_HOST_ADDR, - HECI_MKHI_ADDR)) - goto failed; - - if (!heci_receive(&resp, &resp_size)) - goto failed; - - if (resp.hdr.result) - goto failed; - - printk(BIOS_DEBUG, "ME: Version : %d.%d.%d.%d\n", resp.code.major, - resp.code.minor, resp.code.hotfix, resp.code.build); - return; - -failed: - printk(BIOS_DEBUG, "ME: Version : Unavailable\n"); -} -/* - * This can't be put in intel_me_status because by the time control - * reaches there, ME doesn't respond to GET_FW_VERSION command. - */ -BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_version, NULL); - void intel_me_status(void) { union me_hfsts1 hfs1; @@ -445,3 +371,9 @@ int send_global_reset(void) ret: return status; } + +/* + * This can't be put in intel_me_status because by the time control + * reaches there, ME doesn't respond to GET_FW_VERSION command. + */ +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_fw_version, NULL);