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mb/google/zork: Switch to using newly added i2s_machine_dev driver 

This change switches zork devices to use the newly added
i2s_machine_dev driver in devicetree rather than passing
dmic_select_gpio in SoC config.

BUG=b:157708581

Change-Id: I76c633694cbfb454c081ab2a4af4765bfbbae16b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43543
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2020-07-16 13:40:28 -07:00
parent de4baffb6b
commit 24ec79c39b
4 changed files with 68 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/google/zork/Kconfig
View File

@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_AMD_PICASSO
select VGA_BIOS
select BOARD_ROMSIZE_KB_16384
select DRIVERS_AMD_I2S_MACHINE_DEV
select DISABLE_SPI_FLASH_ROM_SHARING
select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_I2C_GENERIC

27
src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
View File

@ -17,16 +17,6 @@ chip soc/amd/picasso
register "acp_i2s_wake_enable" = "1"
register "acpi_pme_enable" = "1"
# DMIC select GPIO for ACP machine device
# This GPIO is used to select DMIC0 or DMIC1 by the kernel driver. It does not
# really have a polarity since low and high control the selection of DMIC and
# hence does not have an active polarity.
# Kernel driver does not use the polarity field and instead treats the GPIO
# selection as follows:
# Set low (0) = Select DMIC0
# Set high (1) = Select DMIC1
register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)"
# Start : OPN Performance Configuration
# (Configuratin that is common for all variants)
# For the below fields, 0 indicates use SOC default
@ -273,7 +263,22 @@ chip soc/amd/picasso
end
end
end
device pci 0.5 on end # Audio
device pci 0.5 on
chip drivers/amd/i2s_machine_dev
register "hid" = ""AMDI5682""
# DMIC select GPIO for ACP machine device
# This GPIO is used to select DMIC0 or DMIC1 by the
# kernel driver. It does not really have a polarity
# since low and high control the selection of DMIC and
# hence does not have an active polarity.
# Kernel driver does not use the polarity field and
# instead treats the GPIO selection as follows:
# Set low (0) = Select DMIC0
# Set high (1) = Select DMIC1
register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)"
device generic 0.0 on end
end
end # Audio
device pci 0.6 on end # HDA
device pci 0.7 on end # non-Sensor Fusion Hub device
end

27
src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
View File

@ -17,16 +17,6 @@ chip soc/amd/picasso
register "acp_i2s_wake_enable" = "1"
register "acpi_pme_enable" = "1"
# DMIC select GPIO for ACP machine device
# This GPIO is used to select DMIC0 or DMIC1 by the kernel driver. It does not
# really have a polarity since low and high control the selection of DMIC and
# hence does not have an active polarity.
# Kernel driver does not use the polarity field and instead treats the GPIO
# selection as follows:
# Set low (0) = Select DMIC0
# Set high (1) = Select DMIC1
register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)"
# Start : OPN Performance Configuration
# (Configuratin that is common for all variants)
# For the below fields, 0 indicates use SOC default
@ -301,7 +291,22 @@ chip soc/amd/picasso
end
end
end
device pci 0.5 on end # Audio
device pci 0.5 on
chip drivers/amd/i2s_machine_dev
register "hid" = ""AMDI5682""
# DMIC select GPIO for ACP machine device
# This GPIO is used to select DMIC0 or DMIC1 by the
# kernel driver. It does not really have a polarity
# since low and high control the selection of DMIC and
# hence does not have an active polarity.
# Kernel driver does not use the polarity field and
# instead treats the GPIO selection as follows:
# Set low (0) = Select DMIC0
# Set high (1) = Select DMIC1
register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)"
device generic 0.0 on end
end
end # Audio
device pci 0.6 on end # HDA
device pci 0.7 on end # non-Sensor Fusion Hub device
end

33
src/mainboard/google/zork/variants/baseboard/ramstage_common.c
View File

@ -2,19 +2,48 @@
#include <acpi/acpi_device.h>
#include <baseboard/variants.h>
#include <drivers/amd/i2s_machine_dev/chip.h>
#include <ec/google/chromeec/ec.h>
#include <soc/gpio.h>
#include <soc/pci_devs.h>
extern struct chip_operations drivers_amd_i2s_machine_dev_ops;
void variant_audio_update(void)
{
struct soc_amd_picasso_config *cfg = config_of_soc();
struct acpi_gpio *gpio = &cfg->dmic_select_gpio;
const struct device *gpp_a_dev;
const struct device *acp_dev;
struct device *machine_dev = NULL;
if (variant_uses_v3_schematics())
return;
gpp_a_dev = pcidev_path_on_root(PCIE_GPP_A_DEVFN);
if (gpp_a_dev == NULL)
return;
acp_dev = pcidev_path_behind(gpp_a_dev->link_list, AUDIO_DEVFN);
if (acp_dev == NULL)
return;
while ((machine_dev = dev_bus_each_child(acp_dev->link_list, machine_dev)) != NULL) {
struct drivers_amd_i2s_machine_dev_config *cfg;
struct acpi_gpio *gpio;
if (machine_dev->chip_info == NULL)
continue;
if (machine_dev->chip_ops != &drivers_amd_i2s_machine_dev_ops)
continue;
cfg = machine_dev->chip_info;
gpio = &cfg->dmic_select_gpio;
if (CONFIG(BOARD_GOOGLE_BASEBOARD_TREMBYLE))
gpio->pins[0] = GPIO_13;
else
gpio->pins[0] = GPIO_6;
break;
}
}