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Drop unused and incorrect RTC_DEV for Winbond W83627EHG. 

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2010-11-18 19:40:33 +00:00
parent 17e5266c73
commit 24f324cb85
4 changed files with 0 additions and 4 deletions
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1
src/mainboard/asus/a8v-e_deluxe/romstage.c
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@ -50,7 +50,6 @@ unsigned int get_sbdn(unsigned bus);
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
#define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED) #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED)
#define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI) #define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI)
#define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC)
static void memreset(int controllers, const struct mem_controller *ctrl) static void memreset(int controllers, const struct mem_controller *ctrl)
{ {

1
src/mainboard/asus/a8v-e_se/romstage.c
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@ -50,7 +50,6 @@ unsigned int get_sbdn(unsigned bus);
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
#define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED) #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED)
#define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI) #define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI)
#define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC)
static void memreset(int controllers, const struct mem_controller *ctrl) static void memreset(int controllers, const struct mem_controller *ctrl)
{ {

1
src/mainboard/msi/ms9282/romstage.c
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@ -49,7 +49,6 @@
#include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
#define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC)
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c" #include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"

1
src/mainboard/msi/ms9652_fam10/romstage.c
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@ -55,7 +55,6 @@
#include "northbridge/amd/amdfam10/setup_resource_map.c" #include "northbridge/amd/amdfam10/setup_resource_map.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
#define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC)
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c" #include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"