From 24f94765311429d937befb4bebe1632eb683fd2c Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Wed, 25 Feb 2015 11:37:32 -0800 Subject: [PATCH] romstage_handoff: Fix for changing CBMEM structure Adding a new field to a CBMEM structure does not work if there are systems with older RO that do not have this new field as it means romstage did not prepare the field and ramstage is using it uninitialized. To deal with this instead of adding a new field split the existing s3_resume variable into bytes, using the first byte for the existing s3_resume variable (which is always just 0 or 1) and the second byte for the new varible, which will always be 0 for the old RO and can be set by new RO. BUG=chrome-os-partner:37108 BRANCH=samus TEST=manual testing on samus: 1) ensure that if vboot requests reboot after TPM setup that it still works and the reboot happens after reference code execution. 2) ensure that if RO is older without this change that it does not cause a continuous reboot if newer ramstage is added 3) test that suspend resume still works as expected Reviewed-on: https://chromium-review.googlesource.com/253550 Reviewed-by: Alec Berg Reviewed-by: Shawn N (cherry picked from commit 1ccb7ee5fc6980ca0f26fa52b385d2cc52f396c9) Change-Id: I6e206b4a3b33b8a31d102d64bd37d34657cf49ac Signed-off-by: Patrick Georgi Original-Commit-Id: fe85678ee788ff939bc8c084829a1b04232c4c6c Original-Signed-off-by: Duncan Laurie Original-Change-Id: If69d0ff9cc3bf596eee8c3a8d6e04951820a26fe Original-Reviewed-on: https://chromium-review.googlesource.com/256114 Original-Reviewed-by: Shawn N Reviewed-on: http://review.coreboot.org/9833 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/include/romstage_handoff.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index e06d17c5af..376b4fd119 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -33,7 +33,9 @@ struct romstage_handoff { * responsible for initializing this variable. Otherwise, ramstage * will be re-loaded from cbfs (which can be slower since it lives * in flash). */ - uint32_t s3_resume; + uint8_t s3_resume; + uint8_t reboot_required; + uint8_t reserved[2]; /* The ramstage_entry_point is cached in the stag loading path. This * cached value can only be utilized when the chipset code properly * fills in the s3_resume field above. */