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src: Remove space after `defined` 

Change-Id: If450a68e98261ffba4afadbce47c156c7e89e7e4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26460
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2018-05-22 12:29:05 +02:00 committed by Patrick Georgi
parent ee8ce8d208
commit 2526fd4a3d
9 changed files with 13 additions and 13 deletions
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6
src/ec/lenovo/h8/acpi/thermal.asl
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@ -15,7 +15,7 @@
Scope(\_TZ) Scope(\_TZ)
{ {
#if defined (EC_LENOVO_H8_ME_WORKAROUND) #if defined(EC_LENOVO_H8_ME_WORKAROUND)
Name (MEB1, 0) Name (MEB1, 0)
Name (MEB2, 0) Name (MEB2, 0)
#endif #endif
@ -85,7 +85,7 @@ External (\PPKG, MethodObj)
} }
Method(_TMP) { Method(_TMP) {
#if defined (EC_LENOVO_H8_ME_WORKAROUND) #if defined(EC_LENOVO_H8_ME_WORKAROUND)
/* Avoid tripping alarm if ME isn't booted at all yet */ /* Avoid tripping alarm if ME isn't booted at all yet */
If (LAnd (LNot (MEB1), LEqual (\_SB.PCI0.LPCB.EC.TMP0, 128))) { If (LAnd (LNot (MEB1), LEqual (\_SB.PCI0.LPCB.EC.TMP0, 128))) {
Return (C2K(40)) Return (C2K(40))
@ -172,7 +172,7 @@ External (\PPKG, MethodObj)
} }
Method(_TMP) { Method(_TMP) {
#if defined (EC_LENOVO_H8_ME_WORKAROUND) #if defined(EC_LENOVO_H8_ME_WORKAROUND)
/* Avoid tripping alarm if ME isn't booted at all yet */ /* Avoid tripping alarm if ME isn't booted at all yet */
If (LAnd (LNot (MEB2), LEqual (\_SB.PCI0.LPCB.EC.TMP1, 128))) { If (LAnd (LNot (MEB2), LEqual (\_SB.PCI0.LPCB.EC.TMP1, 128))) {
Return (C2K(40)) Return (C2K(40))

2
src/mainboard/google/rambi/romstage.c
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@ -35,7 +35,7 @@ static void *get_spd_pointer(char *spd_file_content, int total_spds, int *dual)
#ifdef GPIO_SSUS_40_PAD_USE_PULLDOWN #ifdef GPIO_SSUS_40_PAD_USE_PULLDOWN
/* To prevent floating pin on shipped systems. */ /* To prevent floating pin on shipped systems. */
ssus_enable_internal_pull(GPIO_SSUS_40_PAD, PAD_PULL_DOWN | PAD_PU_20K); ssus_enable_internal_pull(GPIO_SSUS_40_PAD, PAD_PULL_DOWN | PAD_PU_20K);
#elif defined (GPIO_SSUS_40_PAD) #elif defined(GPIO_SSUS_40_PAD)
ssus_disable_internal_pull(GPIO_SSUS_40_PAD); ssus_disable_internal_pull(GPIO_SSUS_40_PAD);
#endif #endif
ram_id |= (ssus_get_gpio(GPIO_SSUS_37_PAD) << 0); ram_id |= (ssus_get_gpio(GPIO_SSUS_37_PAD) << 0);

6
src/soc/broadcom/cygnus/ddr_init.c
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@ -713,7 +713,7 @@ static int write_shmoo_to_flash(void *buf, int length)
return ret; return ret;
} }
#elif defined (CONFIG_SPI_FLASH) && defined(CONFIG_ENV_IS_IN_SPI_FLASH) && CONFIG_ENV_IS_IN_SPI_FLASH #elif defined(CONFIG_SPI_FLASH) && defined(CONFIG_ENV_IS_IN_SPI_FLASH) && CONFIG_ENV_IS_IN_SPI_FLASH
static int write_shmoo_to_flash(void *buf, int length) static int write_shmoo_to_flash(void *buf, int length)
{ {
@ -761,7 +761,7 @@ static int write_shmoo_to_flash(void *buf, int length)
return ret; return ret;
} }
#elif defined (CONFIG_ENV_IS_IN_FLASH) #elif defined(CONFIG_ENV_IS_IN_FLASH)
static int write_shmoo_to_flash(void *buf, int length) static int write_shmoo_to_flash(void *buf, int length)
{ {
@ -841,7 +841,7 @@ static volatile uint32_t *validate_flash_shmoo_values(struct shmoo_signature *ps
/* Read SHMOO data from NAND */ /* Read SHMOO data from NAND */
flptr = (volatile uint32_t *)(IPROC_NAND_MEM_BASE + CONFIG_SHMOO_REUSE_NAND_OFFSET); flptr = (volatile uint32_t *)(IPROC_NAND_MEM_BASE + CONFIG_SHMOO_REUSE_NAND_OFFSET);
offset = (CONFIG_SHMOO_REUSE_NAND_RANGE - 1) / SHMOO_MIN_BLOCK_SIZE * SHMOO_MIN_BLOCK_SIZE; offset = (CONFIG_SHMOO_REUSE_NAND_RANGE - 1) / SHMOO_MIN_BLOCK_SIZE * SHMOO_MIN_BLOCK_SIZE;
#elif defined (CONFIG_ENV_IS_IN_FLASH) #elif defined(CONFIG_ENV_IS_IN_FLASH)
/* Read SHMOO data from NOR */ /* Read SHMOO data from NOR */
flptr = (volatile uint32_t *)(IPROC_NOR_MEM_BASE + CONFIG_SHMOO_REUSE_NOR_OFFSET); flptr = (volatile uint32_t *)(IPROC_NOR_MEM_BASE + CONFIG_SHMOO_REUSE_NOR_OFFSET);
offset = 0; offset = 0;

2
src/southbridge/intel/bd82x6x/pch.h
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@ -54,7 +54,7 @@
#ifndef __ACPI__ #ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0 #define DEBUG_PERIODIC_SMIS 0
#if defined (__SMM__) && !defined(__ASSEMBLER__) #if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void); void intel_pch_finalize_smm(void);
#endif #endif

2
src/southbridge/intel/fsp_bd82x6x/pch.h
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@ -55,7 +55,7 @@
#ifndef __ACPI__ #ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0 #define DEBUG_PERIODIC_SMIS 0
#if defined (__SMM__) && !defined(__ASSEMBLER__) #if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void); void intel_pch_finalize_smm(void);
#endif #endif

2
src/southbridge/intel/fsp_i89xx/pch.h
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@ -54,7 +54,7 @@
#ifndef __ACPI__ #ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0 #define DEBUG_PERIODIC_SMIS 0
#if defined (__SMM__) && !defined(__ASSEMBLER__) #if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void); void intel_pch_finalize_smm(void);
#endif #endif

2
src/southbridge/intel/fsp_rangeley/soc.h
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@ -50,7 +50,7 @@
#ifndef __ACPI__ #ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0 #define DEBUG_PERIODIC_SMIS 0
#if defined (__SMM__) && !defined(__ASSEMBLER__) #if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_soc_finalize_smm(void); void intel_soc_finalize_smm(void);
#endif #endif

2
src/southbridge/intel/ibexpeak/pch.h
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@ -49,7 +49,7 @@
#ifndef __ACPI__ #ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0 #define DEBUG_PERIODIC_SMIS 0
#if defined (__SMM__) && !defined(__ASSEMBLER__) #if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void); void intel_pch_finalize_smm(void);
#endif #endif

2
src/southbridge/intel/lynxpoint/pch.h
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@ -91,7 +91,7 @@
#ifndef __ACPI__ #ifndef __ACPI__
#if defined (__SMM__) && !defined(__ASSEMBLER__) #if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void); void intel_pch_finalize_smm(void);
void usb_ehci_sleep_prepare(device_t dev, u8 slp_typ); void usb_ehci_sleep_prepare(device_t dev, u8 slp_typ);
void usb_ehci_disable(device_t dev); void usb_ehci_disable(device_t dev);