src/mb: Remove some unneeded includes

Change-Id: I3108193c0e0b644cecb74ae0c7a7b54e24a75b58
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/mainboard/apple/macbook21/mainboard.c

@@ -15,7 +15,6 @@
  * GNU General Public License for more details.
  */
 
-#include <console/console.h>
 #include <device/device.h>
 #include <arch/io.h>
 #include <delay.h>
@@ -25,7 +24,6 @@
 #include <arch/io.h>
 #include <arch/interrupt.h>
 #include <northbridge/intel/i945/i945.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/x86/include/arch/acpigen.h>
 #include <drivers/intel/gma/int15.h>
 #include <ec/acpi/ec.h>

src/mainboard/apple/macbook21/romstage.c

@@ -26,7 +26,6 @@
 #include <cpu/x86/lapic.h>
 #include <lib.h>
 #include <timestamp.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <halt.h>

src/mainboard/apple/macbook21/smihandler.c

@@ -19,7 +19,6 @@
 #include <cpu/x86/smm.h>
 #include <southbridge/intel/i82801gx/nvs.h>
 #include <southbridge/intel/i82801gx/i82801gx.h>
-#include <pc80/mc146818rtc.h>
 #include <delay.h>
 
 #define GPE_EC_SCI	12

src/mainboard/asus/p5gc-mx/romstage.c

@@ -28,7 +28,6 @@
 #include <timestamp.h>
 #include <superio/winbond/common/winbond.h>
 #include <superio/winbond/w83627dhg/w83627dhg.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>

src/mainboard/emulation/qemu-i440fx/romstage.c

@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>

src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c

@@ -27,7 +27,6 @@
 #include <timestamp.h>
 #include <superio/ite/it8718f/it8718f.h>
 #include <superio/ite/common/ite.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>

src/mainboard/google/beltino/mainboard.c

@@ -26,7 +26,6 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
 #include <southbridge/intel/lynxpoint/pch.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include "onboard.h"

src/mainboard/google/butterfly/mainboard.c

@@ -23,7 +23,6 @@
 #include <console/console.h>
 #include <drivers/intel/gma/int15.h>
 #include <fmap.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/google/butterfly/romstage.c

@@ -22,7 +22,6 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
@@ -31,7 +30,6 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <halt.h>
 #if IS_ENABLED(CONFIG_CHROMEOS)
 #include <vendorcode/google/chromeos/chromeos.h>

src/mainboard/google/link/i915.c

@@ -22,7 +22,6 @@
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <delay.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/google/link/mainboard.c

@@ -24,7 +24,6 @@
 #if IS_ENABLED(CONFIG_VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/google/link/romstage.c

@@ -23,7 +23,6 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
@@ -32,7 +31,6 @@
 #include <southbridge/intel/common/gpio.h>
 #include "ec/google/chromeec/ec.h"
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <halt.h>
 #include <cbfs.h>
 

src/mainboard/google/parrot/mainboard.c

@@ -21,7 +21,6 @@
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/google/parrot/romstage.c

@@ -22,7 +22,6 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
@@ -31,7 +30,6 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <halt.h>
 #include <cbfs.h>
 #include "ec/compal/ene932/ec.h"

src/mainboard/google/rambi/mainboard.c

@@ -24,7 +24,6 @@
 #if IS_ENABLED(CONFIG_VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/google/slippy/mainboard.c

@@ -23,7 +23,6 @@
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/google/stout/mainboard.c

@@ -21,7 +21,6 @@
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/google/stout/romstage.c

@@ -22,7 +22,6 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
@@ -31,7 +30,6 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <halt.h>
 #include <bootmode.h>
 #include <cbfs.h>

src/mainboard/intel/baskingridge/mainboard.c

@@ -20,9 +20,7 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/intel/bayleybay_fsp/mainboard.c

@@ -17,14 +17,11 @@
 #include <types.h>
 #include <string.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <console/console.h>
 #if IS_ENABLED(CONFIG_VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/intel/camelbackmountain_fsp/mainboard.c

@@ -17,14 +17,11 @@
 #include <types.h>
 #include <string.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <console/console.h>
 #if IS_ENABLED(CONFIG_VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/intel/cougar_canyon2/mainboard.c

@@ -17,12 +17,9 @@
 #include <types.h>
 #include <string.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/intel/cougar_canyon2/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <cbmem.h>
 #include <console/console.h>
 #include <halt.h>
@@ -38,7 +37,6 @@
 #include <southbridge/intel/fsp_bd82x6x/gpio.h>
 #include <southbridge/intel/fsp_bd82x6x/me.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include "gpio.h"
 
 #define SIO_PORT 0x164e

src/mainboard/intel/d510mo/mainboard.c

@@ -16,7 +16,6 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
 #include <device/pci.h>
 #include <drivers/intel/gma/int15.h>
 

src/mainboard/intel/emeraldlake2/mainboard.c

@@ -17,12 +17,9 @@
 #include <types.h>
 #include <string.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/intel/emeraldlake2/romstage.c

@@ -22,9 +22,7 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
-#include <console/console.h>
 #include <superio/smsc/sio1007/chip.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit.h>
@@ -32,7 +30,6 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <halt.h>
 
 #define SIO_PORT 0x164e

src/mainboard/intel/stargo2/mainboard.c

@@ -20,8 +20,6 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <console/console.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <boot/coreboot_tables.h>

src/mainboard/intel/stargo2/romstage.c

@@ -24,9 +24,6 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <cpu/x86/msr.h>
-#include <pc80/mc146818rtc.h>
-#include <console/console.h>
 #include <halt.h>
 #include <reset.h>
 #include <fsp_util.h>

src/mainboard/intel/wtm2/mainboard.c

@@ -20,9 +20,7 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/kontron/ktqm77/romstage.c

@@ -22,9 +22,7 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
-#include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>

src/mainboard/lenovo/t400/romstage.c

@@ -21,12 +21,10 @@
 #include <arch/io.h>
 #include <arch/acpi.h>
 #include <cpu/x86/lapic.h>
-#include <cpu/x86/msr.h>
 #include <cpu/x86/tsc.h>
 #include <cpu/intel/romstage.h>
 #include <cbmem.h>
 #include <lib.h>
-#include <pc80/mc146818rtc.h>
 #include <romstage_handoff.h>
 #include <console/console.h>
 #include <southbridge/intel/i82801ix/i82801ix.h>

src/mainboard/lenovo/t420s/smihandler.c

@@ -19,7 +19,6 @@
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <ec/acpi/ec.h>
-#include <pc80/mc146818rtc.h>
 #include <ec/lenovo/h8/h8.h>
 #include <delay.h>
 #include <southbridge/intel/bd82x6x/nvs.h>

src/mainboard/lenovo/t520/romstage.c

@@ -24,15 +24,12 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
-#include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <cbfs.h>
 #include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
 #include <device/device.h>

src/mainboard/lenovo/t520/smihandler.c

@@ -19,7 +19,6 @@
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <ec/acpi/ec.h>
-#include <pc80/mc146818rtc.h>
 #include <ec/lenovo/h8/h8.h>
 #include <delay.h>
 #include <southbridge/intel/bd82x6x/nvs.h>

src/mainboard/lenovo/t530/smihandler.c

@@ -19,7 +19,6 @@
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <ec/acpi/ec.h>
-#include <pc80/mc146818rtc.h>
 #include <ec/lenovo/h8/h8.h>
 #include <delay.h>
 #include <southbridge/intel/bd82x6x/nvs.h>

src/mainboard/lenovo/t60/mainboard.c

@@ -21,7 +21,6 @@
 #include <ec/lenovo/h8/h8.h>
 #include <ec/acpi/ec.h>
 #include <northbridge/intel/i945/i945.h>
-#include <pc80/mc146818rtc.h>
 #include <drivers/intel/gma/int15.h>
 #include <arch/acpigen.h>
 

src/mainboard/lenovo/t60/romstage.c

@@ -26,7 +26,6 @@
 #include <lib.h>
 #include <arch/acpi.h>
 #include <timestamp.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>

src/mainboard/lenovo/x1_carbon_gen1/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
@@ -33,7 +32,6 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <cbfs.h>
 
 void pch_enable_lpc(void)

src/mainboard/lenovo/x200/romstage.c

@@ -21,12 +21,10 @@
 #include <arch/io.h>
 #include <arch/acpi.h>
 #include <cpu/x86/lapic.h>
-#include <cpu/x86/msr.h>
 #include <cpu/x86/tsc.h>
 #include <cpu/intel/romstage.h>
 #include <cbmem.h>
 #include <lib.h>
-#include <pc80/mc146818rtc.h>
 #include <romstage_handoff.h>
 #include <console/console.h>
 #include <southbridge/intel/i82801ix/i82801ix.h>

src/mainboard/lenovo/x201/mainboard.c

@@ -23,7 +23,6 @@
 #include <northbridge/intel/nehalem/nehalem.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 
-#include <pc80/mc146818rtc.h>
 #include "dock.h"
 #include <drivers/intel/gma/int15.h>
 #include <pc80/keyboard.h>

src/mainboard/lenovo/x201/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <lib.h>
-#include <pc80/mc146818rtc.h>
 #include <romstage_handoff.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>

src/mainboard/lenovo/x201/smihandler.c

@@ -23,7 +23,6 @@
 #include <northbridge/intel/nehalem/nehalem.h>
 #include <cpu/intel/model_2065x/model_2065x.h>
 #include <ec/acpi/ec.h>
-#include <pc80/mc146818rtc.h>
 #include <ec/lenovo/h8/h8.h>
 #include <delay.h>
 #include "dock.h"

src/mainboard/lenovo/x220/smihandler.c

@@ -19,7 +19,6 @@
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <ec/acpi/ec.h>
-#include <pc80/mc146818rtc.h>
 #include <ec/lenovo/h8/h8.h>
 #include <delay.h>
 #include <southbridge/intel/bd82x6x/nvs.h>

src/mainboard/lenovo/x230/romstage.c

@@ -24,15 +24,12 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
-#include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <cbfs.h>
 
 void pch_enable_lpc(void)

src/mainboard/lenovo/x60/mainboard.c

@@ -22,7 +22,6 @@
 #include <arch/io.h>
 #include <ec/acpi/ec.h>
 #include <northbridge/intel/i945/i945.h>
-#include <pc80/mc146818rtc.h>
 #include "dock.h"
 #include <drivers/intel/gma/int15.h>
 #include <drivers/lenovo/lenovo.h>

src/mainboard/lenovo/x60/romstage.c

@@ -26,7 +26,6 @@
 #include <lib.h>
 #include <arch/acpi.h>
 #include <timestamp.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>

src/mainboard/lenovo/z61t/mainboard.c

@@ -21,7 +21,6 @@
 #include <ec/lenovo/h8/h8.h>
 #include <ec/acpi/ec.h>
 #include <northbridge/intel/i945/i945.h>
-#include <pc80/mc146818rtc.h>
 #include <drivers/intel/gma/int15.h>
 #include <arch/acpigen.h>
 

src/mainboard/lenovo/z61t/romstage.c

@@ -26,7 +26,6 @@
 #include <lib.h>
 #include <arch/acpi.h>
 #include <timestamp.h>
-#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>

src/mainboard/ocp/monolake/mainboard.c

@@ -14,21 +14,10 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #if IS_ENABLED(CONFIG_VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <pc80/mc146818rtc.h>
-#include <arch/acpi.h>
-#include <arch/io.h>
-#include <arch/interrupt.h>
-#include <boot/coreboot_tables.h>
 
 /*
  * mainboard_enable is executed as first thing after enumerate_buses().

src/mainboard/ocp/wedge100s/mainboard.c

@@ -14,21 +14,10 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #if IS_ENABLED(CONFIG_VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <pc80/mc146818rtc.h>
-#include <arch/acpi.h>
-#include <arch/io.h>
-#include <arch/interrupt.h>
-#include <boot/coreboot_tables.h>
 
 /*
  * mainboard_enable is executed as first thing after enumerate_buses().

src/mainboard/packardbell/ms2290/mainboard.c

@@ -27,8 +27,6 @@
 #include <northbridge/intel/nehalem/nehalem.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <ec/acpi/ec.h>
-
-#include <pc80/mc146818rtc.h>
 #include <arch/x86/include/arch/acpigen.h>
 #include <drivers/intel/gma/int15.h>
 #include <arch/interrupt.h>

src/mainboard/packardbell/ms2290/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <lib.h>
-#include <pc80/mc146818rtc.h>
 #include <romstage_handoff.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>

src/mainboard/packardbell/ms2290/smihandler.c

@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <southbridge/intel/ibexpeak/nvs.h>
@@ -23,7 +22,6 @@
 #include <northbridge/intel/nehalem/nehalem.h>
 #include <cpu/intel/model_2065x/model_2065x.h>
 #include <ec/acpi/ec.h>
-#include <pc80/mc146818rtc.h>
 #include <delay.h>
 
 static void mainboard_smm_init(void)

src/mainboard/roda/rk9/romstage.c

@@ -26,7 +26,6 @@
 #include <arch/acpi.h>
 #include <cbmem.h>
 #include <lib.h>
-#include <pc80/mc146818rtc.h>
 #include <romstage_handoff.h>
 #include <console/console.h>
 #include <southbridge/intel/i82801ix/i82801ix.h>

src/mainboard/samsung/lumpy/mainboard.c

@@ -19,11 +19,8 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
-#include <arch/io.h>
 #include <arch/interrupt.h>
 #include <boot/coreboot_tables.h>
 #include <ec/smsc/mec1308/ec.h>

src/mainboard/samsung/lumpy/romstage.c

@@ -22,7 +22,6 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
 #include <cbfs.h>
 #include <arch/acpi.h>
 #include <console/console.h>
@@ -33,7 +32,6 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <halt.h>
 #include "option_table.h"
 #if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)

src/mainboard/samsung/stumpy/mainboard.c

@@ -14,19 +14,9 @@
  * GNU General Public License for more details.
  */
 
-#include <types.h>
-#include <string.h>
 #include <device/device.h>
-#include <device/device.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <console/console.h>
 #include <drivers/intel/gma/int15.h>
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
-#include <arch/io.h>
-#include <arch/interrupt.h>
-#include <boot/coreboot_tables.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 

src/mainboard/samsung/stumpy/romstage.c

@@ -34,7 +34,6 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/cpu.h>
-#include <cpu/x86/msr.h>
 #include <halt.h>
 #if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)
 #include <superio/smsc/lpc47n207/lpc47n207.h>

src/mainboard/siemens/mc_bdx1/mainboard.c

@@ -26,7 +26,6 @@
 #if IS_ENABLED(CONFIG_VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>

src/mainboard/siemens/mc_tcu3/mainboard.c

@@ -17,14 +17,12 @@
 #include <types.h>
 #include <string.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #if IS_ENABLED(CONFIG_VGA_ROM_RUN)
 #include <x86emu/x86emu.h>
 #endif
-#include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/interrupt.h>