new register format
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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3874d40ad6
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@ -34,7 +34,9 @@ end
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##
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southbridge winbond/w83c553 end
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superio NSC/pc97307
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register ".com1={1}, .lpt={0}, .port=SIO_COM1_BASE"
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register "com1" = "{1}"
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register "lpt" = "{0}"
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register "port" = "SIO_COM1_BASE"
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end
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##
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@ -528,24 +528,18 @@ class partobj:
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self.children = 0
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self.siblings = 0
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self.initcode = []
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self.registercode = []
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self.registercode = {}
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# sibling is not a list.
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self.type = type
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self.objects = []
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self.dir = dir
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self.irq = 0
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self.instance = image.newpartinstance()
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self.flatten_name = flatten_name(type + "/" + name)
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self.flatten_name = flatten_name(os.path.join(type, name))
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debug.info(debug.object, "INSTANCE %d" % self.instance)
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self.devfn = 0
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self.private = 0
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self.uses_options = {}
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# chip initialization. If there is a chip.h in the
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# directory, generate the structs etc. to
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# initialize the code
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if (os.path.exists(dir + "/" + "chip.h")):
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self.chipconfig = 1
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else:
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self.chipconfig = 0
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if (parent):
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@ -575,14 +569,14 @@ class partobj:
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for i in self.initcode:
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print " %s" % i
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print "%d: registercode " % lvl
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for i in self.registercode:
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print " %s" % i
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for f, v in self.registercode.items():
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print " %s = %s" % (f, v)
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print "\n"
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def gencode(self, file):
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if (self.chipconfig):
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debug.info(debug.gencode, "gencode: chipconfig(%d)" % self.instance)
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file.write("#include \"%s/chip.h\"\n" % self.dir)
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file.write("#include \"%s\"\n" % os.path.join(self.dir, self.chipconfig))
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file.write("extern struct chip_control %s_control;\n" % \
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self.flatten_name)
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file.write("struct %s_config %s_config_%d" % (\
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@ -591,9 +585,9 @@ class partobj:
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self.instance))
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if (self.registercode):
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file.write("\t= {\n")
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for i in self.registercode:
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file.write( "\t %s" % i)
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file.write("\t};\n")
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for f, v in self.registercode.items():
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file.write( " .%s = %s;\n" % (f, v))
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file.write("};\n")
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else:
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file.write(";")
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file.write("\n");
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@ -629,9 +623,13 @@ class partobj:
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def addinit(self, code):
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self.initcode.append(code)
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def addregister(self, code):
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code = dequote(code)
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self.registercode.append(code)
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def addconfig(self, path):
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self.chipconfig = path
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def addregister(self, field, value):
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field = dequote(field)
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value = dequote(value)
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setdict(self.registercode, field, value)
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def usesoption(self, name):
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global global_options
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@ -865,10 +863,15 @@ def addinit(path):
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curimage.setinitfile(dirstack.tos() + '/' + path)
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print "Adding init file: %s" % path
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def addregister(code):
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def addconfig(path):
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global partstack
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curpart = partstack.tos()
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curpart.addregister(code)
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curpart.addconfig(path)
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def addregister(field, value):
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global partstack
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curpart = partstack.tos()
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curpart.addregister(field, value)
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def addcrt0include(path):
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"""we do the crt0include as a dictionary, so that if needed we
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@ -1100,6 +1103,7 @@ parser Config:
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token ARCH: 'arch'
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token BUILDROM: 'buildrom'
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token COMMENT: 'comment'
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token CONFIG: 'config'
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token CPU: 'cpu'
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token DEFAULT: 'default'
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token DEFINE: 'define'
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@ -1239,7 +1243,9 @@ parser Config:
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rule init<<C>>: INIT DIRPATH {{ if (C): addinit(DIRPATH) }}
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rule register<<C>>: REGISTER STR {{ if (C): addregister(STR) }}
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rule field: STR {{ return STR }}
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rule register<<C>>: REGISTER field '=' STR {{ if (C): addregister(field, STR) }}
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rule prtval: expr {{ return str(expr) }}
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| STR {{ return STR }}
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@ -1252,8 +1258,11 @@ parser Config:
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[ "," prtlist {{ val = val + prtlist }}
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] {{ if (C): print eval(val) }}
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rule config<<C>>: CONFIG PATH {{ if (C): addconfig(PATH) }}
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rule stmt<<C>>: arch<<C>> {{ return arch}}
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| addaction<<C>> {{ return addaction }}
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| config<<C>> {{ return config}}
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| cpu<<C>> {{ return cpu}}
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| dir<<C>> {{ return dir}}
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| driver<<C>> {{ return driver }}
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@ -1459,8 +1468,8 @@ def writeimagemakefile(image):
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file.write("SOURCES += %s\n" % (obj_source))
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# for chip_target.c
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file.write("OBJECTS += chip_%s.o\n" % target_name)
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file.write("SOURCES += chip_%s.c\n" % target_name)
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file.write("OBJECTS += static.o\n")
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file.write("SOURCES += static.c\n")
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for driverrule, driver in image.getdriverrules().items():
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obj_name = driver[0]
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@ -1527,7 +1536,7 @@ def writeimagemakefile(image):
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#file.write("%s\n" % objrule[2])
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# special rule for chip_target.c
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file.write("chip_%s.o: chip_%s.c\n" % (target_name, target_name))
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file.write("static.o: static.c\n")
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file.write("\t$(CC) -c $(CFLAGS) -o $@ $<\n")
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# Print out the rules that will make cause the files
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@ -1537,7 +1546,7 @@ def writeimagemakefile(image):
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file.write("GENERATED:=\n")
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for genfile in ['Makefile',
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'nsuperio.c',
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'chip_%s.c' % target_name,
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'static.c',
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'LinuxBIOSDoc.config' ]:
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file.write("GENERATED += %s\n" % genfile)
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file.write("GENERATED += %s\n" % image.getincludefilename())
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@ -1649,7 +1658,7 @@ def dumptree(part, lvl):
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debug.info(debug.dumptree, "DONE DUMPTREE")
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def writecode(image):
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filename = os.path.join(img_dir, "chip_%s.c" % target_name)
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filename = os.path.join(img_dir, "static.c")
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print "Creating", filename
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file = open(filename, 'w+')
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# gen all the forward references
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