From 253cd5a7e6e2a651c2b0b85ebb6e9103567cae31 Mon Sep 17 00:00:00 2001 From: praveen hodagatta pranesh Date: Fri, 12 Oct 2018 01:25:46 +0800 Subject: [PATCH] mb/intel/coffeelake_rvp: Add HDA controller driver support for coffee lake this patch adds following changes - Select config to initialize codecs in common HDA driver. - Add audio verb table for coffee lake RVP11 & RVP8. BUG: None TEST: boot to yocto linux and windows os on CFL RVP11 & RVP8. verified audio playback and record functionality over anolog audio jack & HDMI display. Change-Id: I567e317c0e9ac9f91e159866c7f896e4c101712b Signed-off-by: praveen hodagatta pranesh Reviewed-on: https://review.coreboot.org/29067 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/mainboard/intel/coffeelake_rvp/Kconfig | 1 + .../intel/coffeelake_rvp/Makefile.inc | 1 + src/mainboard/intel/coffeelake_rvp/hda_verb.c | 16 ++ .../variants/cfl_h/include/variant/hda_verb.h | 200 ++++++++++++++++++ .../variants/cfl_s/include/variant/hda_verb.h | 200 ++++++++++++++++++ 5 files changed, 418 insertions(+) create mode 100644 src/mainboard/intel/coffeelake_rvp/hda_verb.c create mode 100644 src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/hda_verb.h create mode 100644 src/mainboard/intel/coffeelake_rvp/variants/cfl_s/include/variant/hda_verb.h diff --git a/src/mainboard/intel/coffeelake_rvp/Kconfig b/src/mainboard/intel/coffeelake_rvp/Kconfig index 83ab9c5509..f69bb71455 100644 --- a/src/mainboard/intel/coffeelake_rvp/Kconfig +++ b/src/mainboard/intel/coffeelake_rvp/Kconfig @@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS select SOC_INTEL_COFFEELAKE select SOC_INTEL_CANNONLAKE_MEMCFG_INIT select SOC_INTEL_CANNONLAKE_PCH_H if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8 + select SOC_INTEL_COMMON_BLOCK_HDA_VERB if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8 config MAINBOARD_DIR string diff --git a/src/mainboard/intel/coffeelake_rvp/Makefile.inc b/src/mainboard/intel/coffeelake_rvp/Makefile.inc index 274645370a..a978dcbd27 100644 --- a/src/mainboard/intel/coffeelake_rvp/Makefile.inc +++ b/src/mainboard/intel/coffeelake_rvp/Makefile.inc @@ -24,6 +24,7 @@ romstage-y += memory.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-y += mainboard.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c subdirs-y += variants/baseboard CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include diff --git a/src/mainboard/intel/coffeelake_rvp/hda_verb.c b/src/mainboard/intel/coffeelake_rvp/hda_verb.c new file mode 100644 index 0000000000..9ab4778274 --- /dev/null +++ b/src/mainboard/intel/coffeelake_rvp/hda_verb.c @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Intel Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "variant/hda_verb.h" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/hda_verb.h b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/hda_verb.h new file mode 100644 index 0000000000..f921f3ff1f --- /dev/null +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/include/variant/hda_verb.h @@ -0,0 +1,200 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Damien Zammit + * Copyright 2018 Intel Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef HDA_VERB_H +#define HDA_VERB_H + +#include + +const u32 cim_verb_data[] = { + + /* + * VerbTable: CFL Display Audio Codec + * Revision ID = 0xFF + * Codec Vendor: 0x8086280B + */ + + 0x8086280B, + 0xFFFFFFFF, + 0x00000005, + + /* + * Display Audio Verb Table + * For GEN9, the Vendor Node ID is 08h + * Port to be exposed to the inbox driver in the vanilla mode + * PORT C - BIT[7:6] = 01b + */ + 0x00878140, + 0x00878140, + 0x00878140, + 0x00878140, + /* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */ + 0x00571C10, + 0x00571D00, + 0x00571E56, + 0x00571F18, + /* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */ + 0x00671C20, + 0x00671D00, + 0x00671E56, + 0x00671F18, + /* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */ + 0x00771C30, + 0x00771D00, + 0x00771E56, + 0x00771F18, + /* Disable the third converter and third Pin (NID 08h) */ + 0x00878140, + 0x00878140, + 0x00878140, + 0x00878140, + + /* ALC700 */ + 0x10EC0700, + 0xFFFFFFFF, + 0x00000015, + + /* + * HDA Codec Subsystem ID Verb-table + * HDA Codec Subsystem ID : 0x10EC112C + */ + 0x0017202C, + 0x00172111, + 0x001722EC, + 0x00172310, + + /* + * Pin Widget Verb-table + * Widget node 0x01 + */ + 0x0017FF00, + 0x0017FF00, + 0x0017FF00, + 0x0017FF00, + /* Pin widget 0x12 - DMIC */ + 0x01271C00, + 0x01271D00, + 0x01271E00, + 0x01271F40, + /* Pin widget 0x13 - DMIC */ + 0x01371CF0, + 0x01371D11, + 0x01371E11, + 0x01371F41, + /* Pin widget 0x14 - FRONT (Port-D) */ + 0x01471CF0, + 0x01471D11, + 0x01471E11, + 0x01471F41, + /* Pin widget 0x15 - I2S-OUT */ + 0x01571C10, + 0x01571D01, + 0x01571E17, + 0x01571F90, + /* Pin widget 0x16 - LINE3 (Port-B) */ + 0x01671C20, + 0x01671D10, + 0x01671E01, + 0x01671F01, + /* Pin widget 0x17 - I2S-OUT */ + 0x01771CF0, + 0x01771D11, + 0x01771E11, + 0x01771F41, + /* Pin widget 0x18 - I2S-IN */ + 0x01871CF0, + 0x01871D11, + 0x01871E11, + 0x01871F41, + /* Pin widget 0x19 - MIC2 (Port-F) */ + 0x01971C30, + 0x01971D90, + 0x01971EA1, + 0x01971F02, + /* Pin widget 0x1A - LINE1 (Port-C) */ + 0x01A71CF0, + 0x01A71D11, + 0x01A71E11, + 0x01A71F41, + /* Pin widget 0x1B - LINE2 (Port-E) */ + 0x01B71C40, + 0x01B71D90, + 0x01B71EA1, + 0x01B71F01, + /* Pin widget 0x1D - PC-BEEP */ + 0x01D71C69, + 0x01D71D84, + 0x01D71E45, + 0x01D71F40, + /* Pin widget 0x1E - S/PDIF-OUT */ + 0x01E71CF0, + 0x01E71D11, + 0x01E71E11, + 0x01E71F41, + /* Pin widget 0x1F - S/PDIF-IN */ + 0x01F71CF0, + 0x01F71D11, + 0x01F71E11, + 0x01F71F41, + /* Pin widget 0x21 - P-OUT (Port-I) */ + 0x02171C2F, + 0x02171D10, + 0x02171E21, + 0x02171F02, + /* Pin widget 0x29 - I2S-IN */ + 0x02971CF0, + 0x02971D11, + 0x02971E11, + 0x02971F41, + /* + * Widget node 0x20 : MIC2-Vrefo-R and MIC2-vrefo-L + * to independent control + */ + 0x02050045, + 0x02045089, + 0x0205004A, + 0x0204201B, + /* Widget node 0x20 - 1 */ + 0x05850000, + 0x05843888, + 0x0205006F, + 0x02042C0B, + /* + * Widget node 0x20 - 2 : Line2-JD gating MIC2-Vrefo-R, + * P-JD gating MIC2-vrefo-L + */ + 0x0205006B, + 0x02044260, + 0x05B50010, + 0x05B45C1D, + + /* Widget node 0X20 for ALC1305 */ + 0x02050024, + 0x02040010, + 0x02050026, + 0x02040000, + 0x02050028, + 0x02040000, + 0x02050029, + 0x0204B024, + +}; + +const u32 pc_beep_verbs[] = { +}; + +AZALIA_ARRAY_SIZES; +#endif diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/include/variant/hda_verb.h b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/include/variant/hda_verb.h new file mode 100644 index 0000000000..f921f3ff1f --- /dev/null +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/include/variant/hda_verb.h @@ -0,0 +1,200 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Damien Zammit + * Copyright 2018 Intel Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef HDA_VERB_H +#define HDA_VERB_H + +#include + +const u32 cim_verb_data[] = { + + /* + * VerbTable: CFL Display Audio Codec + * Revision ID = 0xFF + * Codec Vendor: 0x8086280B + */ + + 0x8086280B, + 0xFFFFFFFF, + 0x00000005, + + /* + * Display Audio Verb Table + * For GEN9, the Vendor Node ID is 08h + * Port to be exposed to the inbox driver in the vanilla mode + * PORT C - BIT[7:6] = 01b + */ + 0x00878140, + 0x00878140, + 0x00878140, + 0x00878140, + /* Pin Widget 5 - PORT B - Configuration Default: 0x18560010 */ + 0x00571C10, + 0x00571D00, + 0x00571E56, + 0x00571F18, + /* Pin Widget 6 - PORT C - Configuration Default: 0x18560020 */ + 0x00671C20, + 0x00671D00, + 0x00671E56, + 0x00671F18, + /* Pin Widget 7 - PORT D - Configuration Default: 0x18560030 */ + 0x00771C30, + 0x00771D00, + 0x00771E56, + 0x00771F18, + /* Disable the third converter and third Pin (NID 08h) */ + 0x00878140, + 0x00878140, + 0x00878140, + 0x00878140, + + /* ALC700 */ + 0x10EC0700, + 0xFFFFFFFF, + 0x00000015, + + /* + * HDA Codec Subsystem ID Verb-table + * HDA Codec Subsystem ID : 0x10EC112C + */ + 0x0017202C, + 0x00172111, + 0x001722EC, + 0x00172310, + + /* + * Pin Widget Verb-table + * Widget node 0x01 + */ + 0x0017FF00, + 0x0017FF00, + 0x0017FF00, + 0x0017FF00, + /* Pin widget 0x12 - DMIC */ + 0x01271C00, + 0x01271D00, + 0x01271E00, + 0x01271F40, + /* Pin widget 0x13 - DMIC */ + 0x01371CF0, + 0x01371D11, + 0x01371E11, + 0x01371F41, + /* Pin widget 0x14 - FRONT (Port-D) */ + 0x01471CF0, + 0x01471D11, + 0x01471E11, + 0x01471F41, + /* Pin widget 0x15 - I2S-OUT */ + 0x01571C10, + 0x01571D01, + 0x01571E17, + 0x01571F90, + /* Pin widget 0x16 - LINE3 (Port-B) */ + 0x01671C20, + 0x01671D10, + 0x01671E01, + 0x01671F01, + /* Pin widget 0x17 - I2S-OUT */ + 0x01771CF0, + 0x01771D11, + 0x01771E11, + 0x01771F41, + /* Pin widget 0x18 - I2S-IN */ + 0x01871CF0, + 0x01871D11, + 0x01871E11, + 0x01871F41, + /* Pin widget 0x19 - MIC2 (Port-F) */ + 0x01971C30, + 0x01971D90, + 0x01971EA1, + 0x01971F02, + /* Pin widget 0x1A - LINE1 (Port-C) */ + 0x01A71CF0, + 0x01A71D11, + 0x01A71E11, + 0x01A71F41, + /* Pin widget 0x1B - LINE2 (Port-E) */ + 0x01B71C40, + 0x01B71D90, + 0x01B71EA1, + 0x01B71F01, + /* Pin widget 0x1D - PC-BEEP */ + 0x01D71C69, + 0x01D71D84, + 0x01D71E45, + 0x01D71F40, + /* Pin widget 0x1E - S/PDIF-OUT */ + 0x01E71CF0, + 0x01E71D11, + 0x01E71E11, + 0x01E71F41, + /* Pin widget 0x1F - S/PDIF-IN */ + 0x01F71CF0, + 0x01F71D11, + 0x01F71E11, + 0x01F71F41, + /* Pin widget 0x21 - P-OUT (Port-I) */ + 0x02171C2F, + 0x02171D10, + 0x02171E21, + 0x02171F02, + /* Pin widget 0x29 - I2S-IN */ + 0x02971CF0, + 0x02971D11, + 0x02971E11, + 0x02971F41, + /* + * Widget node 0x20 : MIC2-Vrefo-R and MIC2-vrefo-L + * to independent control + */ + 0x02050045, + 0x02045089, + 0x0205004A, + 0x0204201B, + /* Widget node 0x20 - 1 */ + 0x05850000, + 0x05843888, + 0x0205006F, + 0x02042C0B, + /* + * Widget node 0x20 - 2 : Line2-JD gating MIC2-Vrefo-R, + * P-JD gating MIC2-vrefo-L + */ + 0x0205006B, + 0x02044260, + 0x05B50010, + 0x05B45C1D, + + /* Widget node 0X20 for ALC1305 */ + 0x02050024, + 0x02040010, + 0x02050026, + 0x02040000, + 0x02050028, + 0x02040000, + 0x02050029, + 0x0204B024, + +}; + +const u32 pc_beep_verbs[] = { +}; + +AZALIA_ARRAY_SIZES; +#endif