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vc/mediatek/mt8195: add FOR_COREBOOT define 

The CONFIG(CHROMEOS) in DRAM calibration code was incorrectly used to
identify implementations for Chromebooks (in coreboot) so we want to
introduce a new flag FOR_COREBOOT to prevent confusion.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ic7a6e24f41c1fda167b5d6bb2d8a2c5c79dda8de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56158
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Rex-BC Chen 2021-07-08 15:40:06 +08:00 committed by Hung-Te Lin
parent 6db9dccc57
commit 2555bd410b
2 changed files with 13 additions and 10 deletions
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1
src/vendorcode/mediatek/mt8195/Makefile.inc
View File

@ -3,3 +3,4 @@ subdirs-y += dramc
CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include
CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8195/dramc/include -Isrc/vendorcode/mediatek/mt8195/include CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8195/dramc/include -Isrc/vendorcode/mediatek/mt8195/include
CPPFLAGS_common += -DFOR_COREBOOT

22
src/vendorcode/mediatek/mt8195/dramc/dramc_top.c
View File

@ -360,7 +360,7 @@ unsigned int dramc_get_vcore_voltage(void)
{ {
#ifdef MTK_PMIC_MT6359 #ifdef MTK_PMIC_MT6359
return mtk_regulator_get_voltage(&reg_vcore); return mtk_regulator_get_voltage(&reg_vcore);
#elif CONFIG(CHROMEOS) #elif defined(FOR_COREBOOT)
return mainboard_get_regulator_vol(MTK_REGULATOR_VCORE); return mainboard_get_regulator_vol(MTK_REGULATOR_VCORE);
#else #else
return 0; return 0;
@ -371,7 +371,7 @@ unsigned int dramc_set_vmdd_voltage(unsigned int ddr_type, unsigned int vdram)
{ {
#ifdef MTK_PMIC_MT6359 #ifdef MTK_PMIC_MT6359
mtk_regulator_set_voltage(&reg_vdram, vdram, MAX_VDRAM); mtk_regulator_set_voltage(&reg_vdram, vdram, MAX_VDRAM);
#elif CONFIG(CHROMEOS) #elif defined(FOR_COREBOOT)
mainboard_set_regulator_vol(MTK_REGULATOR_VDD2, vdram); mainboard_set_regulator_vol(MTK_REGULATOR_VDD2, vdram);
#endif #endif
return 0; return 0;
@ -381,7 +381,7 @@ unsigned int dramc_get_vmdd_voltage(unsigned int ddr_type)
{ {
#ifdef MTK_PMIC_MT6359 #ifdef MTK_PMIC_MT6359
return mtk_regulator_get_voltage(&reg_vdram); return mtk_regulator_get_voltage(&reg_vdram);
#elif CONFIG(CHROMEOS) #elif defined(FOR_COREBOOT)
return mainboard_get_regulator_vol(MTK_REGULATOR_VDD2); return mainboard_get_regulator_vol(MTK_REGULATOR_VDD2);
#else #else
return 0; return 0;
@ -392,7 +392,7 @@ unsigned int dramc_set_vmddq_voltage(unsigned int ddr_type, unsigned int vddq)
{ {
#ifdef MTK_PMIC_MT6359 #ifdef MTK_PMIC_MT6359
mtk_regulator_set_voltage(&reg_vddq, vddq, MAX_VDDQ); mtk_regulator_set_voltage(&reg_vddq, vddq, MAX_VDDQ);
#elif CONFIG(CHROMEOS) #elif defined(FOR_COREBOOT)
mainboard_set_regulator_vol(MTK_REGULATOR_VDDQ, vddq); mainboard_set_regulator_vol(MTK_REGULATOR_VDDQ, vddq);
#endif #endif
return 0; return 0;
@ -402,7 +402,7 @@ unsigned int dramc_get_vmddq_voltage(unsigned int ddr_type)
{ {
#ifdef MTK_PMIC_MT6359 #ifdef MTK_PMIC_MT6359
return mtk_regulator_get_voltage(&reg_vddq); return mtk_regulator_get_voltage(&reg_vddq);
#elif CONFIG(CHROMEOS) #elif defined(FOR_COREBOOT)
return mainboard_get_regulator_vol(MTK_REGULATOR_VDDQ); return mainboard_get_regulator_vol(MTK_REGULATOR_VDDQ);
#else #else
return 0; return 0;
@ -413,17 +413,19 @@ unsigned int dramc_set_vmddr_voltage(unsigned int vmddr)
{ {
#ifdef MTK_PMIC_MT6359 #ifdef MTK_PMIC_MT6359
return mtk_regulator_set_voltage(&reg_vmddr, vmddr, MAX_VMDDR); return mtk_regulator_set_voltage(&reg_vmddr, vmddr, MAX_VMDDR);
#elif CONFIG(CHROMEOS) #elif defined(FOR_COREBOOT)
mainboard_set_regulator_vol(MTK_REGULATOR_VMDDR, vmddr); mainboard_set_regulator_vol(MTK_REGULATOR_VMDDR, vmddr);
#endif
return 0; return 0;
#else
return 0;
#endif
} }
unsigned int dramc_get_vmddr_voltage(void) unsigned int dramc_get_vmddr_voltage(void)
{ {
#ifdef MTK_PMIC_MT6359 #ifdef MTK_PMIC_MT6359
return mtk_regulator_get_voltage(&reg_vmddr); return mtk_regulator_get_voltage(&reg_vmddr);
#elif CONFIG(CHROMEOS) #elif defined(FOR_COREBOOT)
return mainboard_get_regulator_vol(MTK_REGULATOR_VMDDR); return mainboard_get_regulator_vol(MTK_REGULATOR_VMDDR);
#else #else
return 0; return 0;
@ -434,7 +436,7 @@ unsigned int dramc_set_vio18_voltage(unsigned int vio18)
{ {
#ifdef MTK_PMIC_MT6359 #ifdef MTK_PMIC_MT6359
return mtk_regulator_set_voltage(&reg_vio18, vio18, MAX_VIO18); return mtk_regulator_set_voltage(&reg_vio18, vio18, MAX_VIO18);
#elif CONFIG(CHROMEOS) #elif defined(FOR_COREBOOT)
mainboard_set_regulator_vol(MTK_REGULATOR_VDD1, vio18); mainboard_set_regulator_vol(MTK_REGULATOR_VDD1, vio18);
return 0; return 0;
#else #else
@ -447,7 +449,7 @@ unsigned int dramc_get_vio18_voltage(void)
{ {
#ifdef MTK_PMIC_MT6359 #ifdef MTK_PMIC_MT6359
return mtk_regulator_get_voltage(&reg_vio18); return mtk_regulator_get_voltage(&reg_vio18);
#elif CONFIG(CHROMEOS) #elif defined(FOR_COREBOOT)
return mainboard_get_regulator_vol(MTK_REGULATOR_VDD1); return mainboard_get_regulator_vol(MTK_REGULATOR_VDD1);
#else #else
return 0; return 0;