for S2735 support

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Yinghai Lu 2004-10-22 21:33:08 +00:00
parent e99433157b
commit 2560dbdd50
3 changed files with 35 additions and 2 deletions

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@ -1,4 +1,5 @@
dir /cpu/x86/tsc uses CONFIG_UDELAY_TSC
dir /cpu/x86/mtrr dir /cpu/x86/mtrr
dir /cpu/x86/fpu dir /cpu/x86/fpu
dir /cpu/x86/mmx dir /cpu/x86/mmx
@ -8,3 +9,9 @@ dir /cpu/x86/cache
dir /cpu/intel/microcode dir /cpu/intel/microcode
dir /cpu/intel/hyperthreading dir /cpu/intel/hyperthreading
driver model_f2x_init.o driver model_f2x_init.o
if CONFIG_UDELAY_TSC
dir /cpu/x86/tsc
else
object apic_timer.o
end

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@ -0,0 +1,26 @@
#include <stdint.h>
#include <delay.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
void init_timer(void)
{
/* Set the apic timer to no interrupts and periodic mode */
lapic_write(LAPIC_LVTT, (1 << 17)|(1<< 16)|(0 << 12)|(0 << 0));
/* Set the divider to 1, no divider */
lapic_write(LAPIC_TDCR, LAPIC_TDR_DIV_1);
/* Set the initial counter to 0xffffffff */
lapic_write(LAPIC_TMICT, 0xffffffff);
}
void udelay(unsigned usecs)
{
uint32_t start, value, ticks;
/* Calculate the number of ticks to run, our FSB runs a 200Mhz */
ticks = usecs * 200;
start = lapic_read(LAPIC_TMCCT);
do {
value = lapic_read(LAPIC_TMCCT);
} while((start - value) < ticks);
}

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@ -14,7 +14,7 @@
#include "ram/ramtest.c" #include "ram/ramtest.c"
#include "southbridge/intel/i82801er/i82801er_early_smbus.c" #include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/e7501/raminit.h" #include "northbridge/intel/e7501/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c" #include "cpu/intel/model_f2x/apic_timer.c"
#include "lib/delay.c" #include "lib/delay.c"
#include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/intel/e7501/debug.c" #include "northbridge/intel/e7501/debug.c"