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rockchip: rk3399: improve sdram noc timing 

sdram noc timing will affect ddr latency, this patch improves
rk3399 sdram noc timing so improve memory performance.

BRANCH=gru
BUG=chrome-os-partner:57248
TEST=Boot from kevin board

Change-Id: I09e984490a7ad747ef8abfc6542d0e2c95ec19bc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 43dfe55d713d371e39d21312772fd353614b7642
Original-Change-Id: I393e74ecdeb72930ac38ae9bcf311e5654f65162
Original-Signed-off-by: Lin Huang <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/382725
Original-Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Sonny Rao <sonnyrao@chromium.org>
Original-Commit-Queue: Sonny Rao <sonnyrao@chromium.org>
Reviewed-on: https://review.coreboot.org/16713
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lin Huang 2016-09-08 10:21:57 -07:00 committed by Patrick Georgi
parent 74fedbe377
commit 25626389c8
6 changed files with 32 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-200.c
View File

@ -26,11 +26,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x0e080807},
{0x80080807},
{0x05010605},
{0x00000002},
{0x00006076},
{0x00000054},
{0x0000004c},
0x00000000
}
},
@ -45,11 +45,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x0e080807},
{0x80080807},
{0x05010605},
{0x00000002},
{0x00006076},
{0x00000054},
{0x0000004c},
0x00000000
}
}

12
src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666-no-odt.c
View File

@ -26,11 +26,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x19151115},
{0x10030806},
{0x80151115},
{0x11030806},
{0x00000002},
{0x00006206},
{0x00000054},
{0x0000004c},
0x00000000
}
},
@ -45,11 +45,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x19151115},
{0x10030806},
{0x80151115},
{0x11030806},
{0x00000002},
{0x00006206},
{0x00000054},
{0x0000004c},
0x00000000
}
}

12
src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666.c
View File

@ -26,11 +26,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x19151115},
{0x10030806},
{0x80151115},
{0x11030806},
{0x00000002},
{0x00006206},
{0x00000054},
{0x0000004c},
0x00000000
}
},
@ -45,11 +45,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x19151115},
{0x10030806},
{0x80151115},
{0x11030806},
{0x00000002},
{0x00006206},
{0x00000054},
{0x0000004c},
0x00000000
}
}

8
src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800-no-odt.c
View File

@ -26,11 +26,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x1d191519},
{0x80191519},
{0x14040808},
{0x00000002},
{0x00006226},
{0x00000054},
{0x0000004c},
0x00000000
}
},
@ -45,11 +45,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x1d191519},
{0x80191519},
{0x14040808},
{0x00000002},
{0x00006226},
{0x00000054},
{0x0000004c},
0x00000000
}
}

8
src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800.c
View File

@ -26,11 +26,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x1d191519},
{0x80191519},
{0x14040808},
{0x00000002},
{0x00006226},
{0x00000054},
{0x0000004c},
0x00000000
}
},
@ -45,11 +45,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x1d191519},
{0x80191519},
{0x14040808},
{0x00000002},
{0x00006226},
{0x00000054},
{0x0000004c},
0x00000000
}
}

16
src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-933.c
View File

@ -26,11 +26,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x1d191519},
{0x14040808},
{0x801d181e},
{0x17050a08},
{0x00000002},
{0x00006226},
{0x00000054},
{0x00006426},
{0x0000004c},
0x00000000
}
},
@ -45,11 +45,11 @@ struct rk3399_sdram_params params = {
.cs1_row = 0xF,
.ddrconfig = 1,
{
{0x1d191519},
{0x14040808},
{0x801d181e},
{0x17050a08},
{0x00000002},
{0x00006226},
{0x00000054},
{0x00006426},
{0x0000004c},
0x00000000
}
}