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mainboard/asus/kgpe-d16: Add missing IOMMU setup 

Change-Id: I9a00bdbcd47804b6d83c0231cd515773d02ff951
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12527
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Timothy Pearson 2015-11-24 04:06:10 -06:00 committed by Martin Roth
parent eda407f4eb
commit 259549678b
2 changed files with 3 additions and 0 deletions
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1
src/mainboard/asus/kgpe-d16/devicetree.cb
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@ -15,6 +15,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex
chip southbridge/amd/sr5650 # Primary southbridge chip southbridge/amd/sr5650 # Primary southbridge
device pci 0.0 on end # HT Root Complex 0x9600 device pci 0.0 on end # HT Root Complex 0x9600
device pci 0.1 on end # CLKCONFIG device pci 0.1 on end # CLKCONFIG
device pci 0.2 on end # IOMMU
device pci 2.0 on # PCIE P2P bridge 0x9603 (GPP1 Port0) device pci 2.0 on # PCIE P2P bridge 0x9603 (GPP1 Port0)
# Slot # PCI E 1 / PCI E 2 # Slot # PCI E 1 / PCI E 2
end end

2
src/mainboard/asus/kgpe-d16/romstage.c
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@ -458,6 +458,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
die("After soft_reset_x - shouldn't see this message!!!\n"); die("After soft_reset_x - shouldn't see this message!!!\n");
} }
sr5650_htinit_dect_and_enable_isochronous_link();
/* Set default DDR memory voltage /* Set default DDR memory voltage
* This will be overridden later during RAM initialization * This will be overridden later during RAM initialization
*/ */