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mb/google/brya/var/banshee: Add ACPI _PLD custom values 

This patch uses ACPI _PLD macros to add custom values for USB ports.

   +----------------+
   |                |
   |     Screen     |
   |                |
   +----------------+
C3 |                | C0
C2 |                | C1
   |                |
   +----------------+

BUG=b:216490477
TEST=emerge-brya coreboot
BRANCH=firmware-brya-14505.B

Signed-off-by: Won Chung <wonchung@google.com>
Change-Id: I2153f826d7ff05f42935f08d5d1f5127ac944575
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64728
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Won Chung 2022-05-25 16:43:30 +00:00 committed by Felix Held
parent 18c2720c7f
commit 2608f8142a
1 changed files with 16 additions and 8 deletions
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24
src/mainboard/google/brya/variants/banshee/overridetree.cb
View File

@ -293,25 +293,29 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(1, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref tcss_usb3_port3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C3 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(4, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(4, 1))"
device ref tcss_usb3_port4 on end
end
end
@ -323,19 +327,22 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(1, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(3, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@ -347,7 +354,8 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C3 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(4, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(4, 1))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi