superio/smsc: Add support for SMSC DME1737
Change-Id: If2ba9ca48c809fe4f7dc0595a3cb3df168d630fd Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/10893 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Jonathan A. Kollasch
parent
8964717c4d
commit
260a01f2cb
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@ -21,6 +21,8 @@
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config SUPERIO_WANTS_14MHZ_CLOCK
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bool
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config SUPERIO_SMSC_DME1737
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bool
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config SUPERIO_SMSC_FDC37M60X
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bool
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config SUPERIO_SMSC_FDC37N972
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@ -18,6 +18,7 @@
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## Foundation, Inc.
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##
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subdirs-y += dme1737
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subdirs-y += fdc37m60x
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subdirs-y += fdc37n972
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subdirs-y += lpc47b272
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@ -20,5 +20,5 @@
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## Foundation, Inc.
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##
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romstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += early_serial.c
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ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += superio.c
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romstage-$(CONFIG_SUPERIO_SMSC_DME1737) += early_serial.c
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ramstage-$(CONFIG_SUPERIO_SMSC_DME1737) += superio.c
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@ -20,20 +20,19 @@
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* Foundation, Inc.
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*/
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#ifndef SUPERIO_SMSC_LPC47B397_H
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#define SUPERIO_SMSC_LPC47B397_H
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#ifndef SUPERIO_SMSC_DME1737_H
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#define SUPERIO_SMSC_DME1737_H
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#define LPC47B397_FDC 0 /* Floppy */
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#define LPC47B397_PP 3 /* Parallel Port */
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#define LPC47B397_SP1 4 /* Com1 */
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#define LPC47B397_SP2 5 /* Com2 */
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#define LPC47B397_KBC 7 /* Keyboard & Mouse */
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#define LPC47B397_HWM 8 /* HW Monitor */
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#define LPC47B397_RT 10 /* Runtime reg*/
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#define DME1737_FDC 0 /* Floppy */
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#define DME1737_PP 3 /* Parallel Port */
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#define DME1737_SP1 4 /* Com1 */
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#define DME1737_SP2 5 /* Com2 */
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#define DME1737_KBC 7 /* Keyboard & Mouse */
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#define DME1737_RT 10 /* Runtime reg*/
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#include <arch/io.h>
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#include <stdint.h>
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void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase);
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void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase);
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#endif /* SUPERIO_SMSC_LPC47B397_H */
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#endif /* SUPERIO_SMSC_DME1737_H */
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@ -23,7 +23,7 @@
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#include <arch/io.h>
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#include <device/pnp.h>
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#include <stdint.h>
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#include "lpc47b397.h"
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#include "dme1737.h"
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static void pnp_enter_conf_state(pnp_devfn_t dev)
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{
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@ -37,7 +37,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev)
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outb(0xaa, port);
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}
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void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase)
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void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase)
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{
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pnp_enter_conf_state(dev);
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pnp_set_logical_device(dev);
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@ -29,123 +29,37 @@
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#include <string.h>
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#include <pc80/keyboard.h>
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#include <stdlib.h>
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#include "lpc47b397.h"
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#include "dme1737.h"
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static void enable_hwm_smbus(struct device *dev)
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{
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/* Enable SensorBus register access. */
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u8 reg8;
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reg8 = pnp_read_config(dev, 0xf0);
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reg8 |= (1 << 1);
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pnp_write_config(dev, 0xf0, reg8);
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}
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static void lpc47b397_init(struct device *dev)
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static void dme1737_init(struct device *dev)
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{
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if (!dev->enabled)
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return;
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switch(dev->path.pnp.device) {
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case LPC47B397_KBC:
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case DME1737_KBC:
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pc_keyboard_init();
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break;
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}
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}
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static void lpc47b397_pnp_enable_resources(struct device *dev)
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{
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pnp_enable_resources(dev);
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pnp_enter_conf_mode(dev);
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switch(dev->path.pnp.device) {
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case LPC47B397_HWM:
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printk(BIOS_DEBUG, "LPC47B397 SensorBus register access enabled\n");
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pnp_set_logical_device(dev);
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enable_hwm_smbus(dev);
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break;
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}
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/* dump_pnp_device(dev); */
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pnp_exit_conf_mode(dev);
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}
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = lpc47b397_pnp_enable_resources,
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.enable_resources = pnp_enable_resources,
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.enable = pnp_alt_enable,
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.init = lpc47b397_init,
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.ops_pnp_mode = &pnp_conf_mode_55_aa,
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};
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#define HWM_INDEX 0
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#define HWM_DATA 1
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#define SB_INDEX 0x0b
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#define SB_DATA0 0x0c
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#define SB_DATA1 0x0d
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#define SB_DATA2 0x0e
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#define SB_DATA3 0x0f
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static int lsmbus_read_byte(struct device *dev, u8 address)
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{
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unsigned int device;
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struct resource *res;
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int result;
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device = dev->path.i2c.device;
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res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
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pnp_write_index(res->base + HWM_INDEX, 0, device); /* Why 0? */
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/* We only read it one byte one time. */
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result = pnp_read_index(res->base + SB_INDEX, address);
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return result;
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}
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static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
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{
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unsigned int device;
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struct resource *res;
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device = dev->path.i2c.device;
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res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
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pnp_write_index(res->base+HWM_INDEX, 0, device); /* Why 0? */
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/* We only write it one byte one time. */
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pnp_write_index(res->base+SB_INDEX, address, val);
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return 0;
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}
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static struct smbus_bus_operations lops_smbus_bus = {
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/* .recv_byte = lsmbus_recv_byte, */
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/* .send_byte = lsmbus_send_byte, */
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.read_byte = lsmbus_read_byte,
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.write_byte = lsmbus_write_byte,
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};
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static struct device_operations ops_hwm = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = lpc47b397_pnp_enable_resources,
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.enable = pnp_alt_enable,
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.init = lpc47b397_init,
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.ops_smbus_bus = &lops_smbus_bus,
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.init = dme1737_init,
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.ops_pnp_mode = &pnp_conf_mode_55_aa,
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};
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, LPC47B397_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
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{ &ops, LPC47B397_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
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{ &ops, LPC47B397_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, LPC47B397_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, LPC47B397_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
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{ &ops_hwm, LPC47B397_HWM, PNP_IO0, {0x07f0, 0}, },
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{ &ops, LPC47B397_RT, PNP_IO0, {0x0780, 0}, },
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{ &ops, DME1737_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
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{ &ops, DME1737_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
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{ &ops, DME1737_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, DME1737_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, DME1737_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
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{ &ops, DME1737_RT, PNP_IO0, {0x0780, 0}, },
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};
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static void enable_dev(struct device *dev)
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@ -154,7 +68,7 @@ static void enable_dev(struct device *dev)
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ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_smsc_lpc47b397_ops = {
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CHIP_NAME("SMSC LPC47B397 Super I/O")
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struct chip_operations superio_smsc_dme1737_ops = {
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CHIP_NAME("SMSC DME1737 Super I/O")
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.enable_dev = enable_dev,
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};
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