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google/oak: Enable SPI support 

BUG=none
TEST=emerge-oak coreboot
BRANCH=none

[pg: split into multiple commits]

Change-Id: I19f970db40fb8563ef1b782a9606ca3766ef2ac5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 41acc14e9fe54924d20e4e5a2d1519251f0e1c87
Original-Change-Id: I2559be4191da9af523944563729171bd92a86cd0
Original-Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292661
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/13076
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Leilk Liu 2015-07-31 17:10:46 +08:00 committed by Patrick Georgi
parent 1dda32bb13
commit 261059479a
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/google/oak/bootblock.c
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@ -21,6 +21,7 @@
#include <soc/mt6391.h>
#include <soc/pericfg.h>
#include <soc/pinmux.h>
#include <soc/spi.h>
#include "gpio.h"
@ -46,6 +47,8 @@ void bootblock_mainboard_init(void)
/* set i2c related gpio */
i2c_set_gpio_pinmux();
mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD1_MASK, 6*MHz);
setup_chromeos_gpios();
if (board_id() < 4)