soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function
This patch ensures all soc function name is having _soc_ prefix in it. TEST=Able to compile SMM common code for all supported SOC. Change-Id: Iab1b2f51eaad87906e35dbb9e90272590974e145 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22973 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -22,7 +22,7 @@
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#include <soc/pci_devs.h>
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#include <soc/pm.h>
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int smihandler_disable_busmaster(device_t dev)
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int smihandler_soc_disable_busmaster(device_t dev)
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{
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if (dev == PCH_DEV_PMC)
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return 0;
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@ -35,7 +35,7 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void)
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}
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/* SMI handlers that should be serviced in SCI mode too. */
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uint32_t smi_handler_get_sci_mask(void)
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uint32_t smihandler_soc_get_sci_mask(void)
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{
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uint32_t sci_mask =
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SMI_HANDLER_SCI_EN(APM_SMI_STS) |
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@ -25,7 +25,7 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void)
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return &em64t101_smm_ops;
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}
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void smihandler_check_illegal_access(uint32_t tco_sts)
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void smihandler_soc_check_illegal_access(uint32_t tco_sts)
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{
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if (!((tco_sts & (1 << 8)) && IS_ENABLED(CONFIG_SPI_FLASH_SMM)
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&& fast_spi_wpd_status()))
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@ -46,7 +46,7 @@ void smihandler_check_illegal_access(uint32_t tco_sts)
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}
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/* SMI handlers that should be serviced in SCI mode too. */
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uint32_t smi_handler_get_sci_mask(void)
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uint32_t smihandler_soc_get_sci_mask(void)
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{
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uint32_t sci_mask =
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SMI_HANDLER_SCI_EN(APM_STS_BIT) |
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@ -62,9 +62,6 @@ extern const smi_handler_t southbridge_smi[32];
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#define SMI_HANDLER_SCI_EN(__bit) (1 << (__bit))
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/* SMI handlers that should be serviced in SCI mode too. */
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uint32_t smi_handler_get_sci_mask(void);
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/*
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* This function should be implemented in SOC specific code to handle
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* the SMI event on SLP_EN. The default functionality is provided in
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@ -143,23 +140,31 @@ void smihandler_southbridge_gpi(
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*/
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void smihandler_southbridge_espi(
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const struct smm_save_state_ops *save_state_ops);
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/*
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* This function returns a 1 or 0 depending on whether disable_busmaster
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* needs to be done for the specified device on S5 entry
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*/
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int smihandler_disable_busmaster(device_t dev);
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/*
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* SoC needs to implement the mechanism to know if an illegal attempt
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* has been made to write to the BIOS area.
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*/
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void smihandler_check_illegal_access(uint32_t tco_sts);
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/*
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* Returns gnvs pointer within SMM context
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*/
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struct global_nvs_t *smm_get_gnvs(void);
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/* SoC overrides. */
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/*
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* This function returns a 1 or 0 depending on whether disable_busmaster
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* needs to be done for the specified device on S5 entry
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*/
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int smihandler_soc_disable_busmaster(device_t dev);
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/* SMI handlers that should be serviced in SCI mode too. */
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uint32_t smihandler_soc_get_sci_mask(void);
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/*
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* SoC needs to implement the mechanism to know if an illegal attempt
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* has been made to write to the BIOS area.
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*/
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void smihandler_soc_check_illegal_access(uint32_t tco_sts);
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/* Mainboard overrides. */
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/* Mainboard handler for GPI SMIs */
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void mainboard_smi_gpi_handler(const struct gpi_status *sts);
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@ -2,7 +2,7 @@
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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* Copyright (C) 2015-2016 Intel Corp.
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* Copyright (C) 2015-2017 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -38,13 +38,13 @@ static struct global_nvs_t *gnvs;
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/* SoC overrides. */
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__attribute__((weak)) int smihandler_disable_busmaster(device_t dev)
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__attribute__((weak)) int smihandler_soc_disable_busmaster(device_t dev)
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{
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return 1;
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}
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/* SMI handlers that should be serviced in SCI mode too. */
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__attribute__((weak)) uint32_t smi_handler_get_sci_mask(void)
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__attribute__((weak)) uint32_t smihandler_soc_get_sci_mask(void)
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{
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return 0; /* No valid SCI mask for SMI handler */
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}
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@ -53,11 +53,27 @@ __attribute__((weak)) uint32_t smi_handler_get_sci_mask(void)
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* Needs to implement the mechanism to know if an illegal attempt
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* has been made to write to the BIOS area.
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*/
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__attribute__((weak)) void smihandler_check_illegal_access(uint32_t tco_sts)
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__attribute__((weak)) void smihandler_soc_check_illegal_access(
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uint32_t tco_sts)
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{
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return;
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}
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/* Mainboard overrides. */
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__attribute__((weak)) void mainboard_smi_gpi_handler(
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const struct gpi_status *sts)
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{
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return;
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}
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__attribute__((weak)) void mainboard_smi_espi_handler(void)
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{
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return;
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}
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/* Common Functions */
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static void *find_save_state(const struct smm_save_state_ops *save_state_ops,
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int cmd)
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{
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@ -112,7 +128,7 @@ static void busmaster_disable_on_bus(int bus)
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u32 reg32;
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device_t dev = PCI_DEV(bus, slot, func);
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if (!smihandler_disable_busmaster(dev))
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if (!smihandler_soc_disable_busmaster(dev))
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continue;
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val = pci_read_config32(dev, PCI_VENDOR_ID);
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@ -360,7 +376,7 @@ void smihandler_southbridge_tco(
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if (!tco_sts)
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return;
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smihandler_check_illegal_access(tco_sts);
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smihandler_soc_check_illegal_access(tco_sts);
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if (tco_sts & TCO_TIMEOUT) { /* TIMEOUT */
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/* Handle TCO timeout */
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@ -381,9 +397,6 @@ void smihandler_southbridge_periodic(
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printk(BIOS_DEBUG, "Periodic SMI.\n");
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}
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void __attribute__((weak))
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mainboard_smi_gpi_handler(const struct gpi_status *sts) { }
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void smihandler_southbridge_gpi(
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const struct smm_save_state_ops *save_state_ops)
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{
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@ -396,8 +409,6 @@ void smihandler_southbridge_gpi(
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gpi_clear_get_smi_status(&smi_sts);
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}
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void __attribute__((weak)) mainboard_smi_espi_handler(void) { }
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void smihandler_southbridge_espi(
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const struct smm_save_state_ops *save_state_ops)
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{
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@ -419,10 +430,10 @@ void southbridge_smi_handler(void)
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/*
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* In SCI mode, execute only those SMI handlers that have
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* declared themselves as available for service in that mode
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* using smi_handler_get_sci_mask.
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* using smihandler_soc_get_sci_mask.
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*/
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if (pmc_read_pm1_control() & SCI_EN)
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smi_sts &= smi_handler_get_sci_mask();
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smi_sts &= smihandler_soc_get_sci_mask();
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if (!smi_sts)
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return;
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@ -25,7 +25,7 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void)
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return &em64t101_smm_ops;
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}
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void smihandler_check_illegal_access(uint32_t tco_sts)
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void smihandler_soc_check_illegal_access(uint32_t tco_sts)
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{
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if (!((tco_sts & (1 << 8)) && IS_ENABLED(CONFIG_SPI_FLASH_SMM)
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&& fast_spi_wpd_status()))
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}
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/* SMI handlers that should be serviced in SCI mode too. */
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uint32_t smi_handler_get_sci_mask(void)
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uint32_t smihandler_soc_get_sci_mask(void)
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{
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uint32_t sci_mask =
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SMI_HANDLER_SCI_EN(APM_STS_BIT) |
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