soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function

This patch ensures all soc function name is having _soc_ prefix
in it.

TEST=Able to compile SMM common code for all supported SOC.

Change-Id: Iab1b2f51eaad87906e35dbb9e90272590974e145
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22973
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Subrata Banik 2017-12-22 13:41:35 +05:30
parent 57a81a333c
commit 261b893b7c
5 changed files with 49 additions and 33 deletions

View File

@ -22,7 +22,7 @@
#include <soc/pci_devs.h>
#include <soc/pm.h>
int smihandler_disable_busmaster(device_t dev)
int smihandler_soc_disable_busmaster(device_t dev)
{
if (dev == PCH_DEV_PMC)
return 0;
@ -35,7 +35,7 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void)
}
/* SMI handlers that should be serviced in SCI mode too. */
uint32_t smi_handler_get_sci_mask(void)
uint32_t smihandler_soc_get_sci_mask(void)
{
uint32_t sci_mask =
SMI_HANDLER_SCI_EN(APM_SMI_STS) |

View File

@ -25,7 +25,7 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void)
return &em64t101_smm_ops;
}
void smihandler_check_illegal_access(uint32_t tco_sts)
void smihandler_soc_check_illegal_access(uint32_t tco_sts)
{
if (!((tco_sts & (1 << 8)) && IS_ENABLED(CONFIG_SPI_FLASH_SMM)
&& fast_spi_wpd_status()))
@ -46,7 +46,7 @@ void smihandler_check_illegal_access(uint32_t tco_sts)
}
/* SMI handlers that should be serviced in SCI mode too. */
uint32_t smi_handler_get_sci_mask(void)
uint32_t smihandler_soc_get_sci_mask(void)
{
uint32_t sci_mask =
SMI_HANDLER_SCI_EN(APM_STS_BIT) |

View File

@ -62,9 +62,6 @@ extern const smi_handler_t southbridge_smi[32];
#define SMI_HANDLER_SCI_EN(__bit) (1 << (__bit))
/* SMI handlers that should be serviced in SCI mode too. */
uint32_t smi_handler_get_sci_mask(void);
/*
* This function should be implemented in SOC specific code to handle
* the SMI event on SLP_EN. The default functionality is provided in
@ -143,23 +140,31 @@ void smihandler_southbridge_gpi(
*/
void smihandler_southbridge_espi(
const struct smm_save_state_ops *save_state_ops);
/*
* This function returns a 1 or 0 depending on whether disable_busmaster
* needs to be done for the specified device on S5 entry
*/
int smihandler_disable_busmaster(device_t dev);
/*
* SoC needs to implement the mechanism to know if an illegal attempt
* has been made to write to the BIOS area.
*/
void smihandler_check_illegal_access(uint32_t tco_sts);
/*
* Returns gnvs pointer within SMM context
*/
struct global_nvs_t *smm_get_gnvs(void);
/* SoC overrides. */
/*
* This function returns a 1 or 0 depending on whether disable_busmaster
* needs to be done for the specified device on S5 entry
*/
int smihandler_soc_disable_busmaster(device_t dev);
/* SMI handlers that should be serviced in SCI mode too. */
uint32_t smihandler_soc_get_sci_mask(void);
/*
* SoC needs to implement the mechanism to know if an illegal attempt
* has been made to write to the BIOS area.
*/
void smihandler_soc_check_illegal_access(uint32_t tco_sts);
/* Mainboard overrides. */
/* Mainboard handler for GPI SMIs */
void mainboard_smi_gpi_handler(const struct gpi_status *sts);

View File

@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2015-2016 Intel Corp.
* Copyright (C) 2015-2017 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -38,13 +38,13 @@ static struct global_nvs_t *gnvs;
/* SoC overrides. */
__attribute__((weak)) int smihandler_disable_busmaster(device_t dev)
__attribute__((weak)) int smihandler_soc_disable_busmaster(device_t dev)
{
return 1;
}
/* SMI handlers that should be serviced in SCI mode too. */
__attribute__((weak)) uint32_t smi_handler_get_sci_mask(void)
__attribute__((weak)) uint32_t smihandler_soc_get_sci_mask(void)
{
return 0; /* No valid SCI mask for SMI handler */
}
@ -53,11 +53,27 @@ __attribute__((weak)) uint32_t smi_handler_get_sci_mask(void)
* Needs to implement the mechanism to know if an illegal attempt
* has been made to write to the BIOS area.
*/
__attribute__((weak)) void smihandler_check_illegal_access(uint32_t tco_sts)
__attribute__((weak)) void smihandler_soc_check_illegal_access(
uint32_t tco_sts)
{
return;
}
/* Mainboard overrides. */
__attribute__((weak)) void mainboard_smi_gpi_handler(
const struct gpi_status *sts)
{
return;
}
__attribute__((weak)) void mainboard_smi_espi_handler(void)
{
return;
}
/* Common Functions */
static void *find_save_state(const struct smm_save_state_ops *save_state_ops,
int cmd)
{
@ -112,7 +128,7 @@ static void busmaster_disable_on_bus(int bus)
u32 reg32;
device_t dev = PCI_DEV(bus, slot, func);
if (!smihandler_disable_busmaster(dev))
if (!smihandler_soc_disable_busmaster(dev))
continue;
val = pci_read_config32(dev, PCI_VENDOR_ID);
@ -360,7 +376,7 @@ void smihandler_southbridge_tco(
if (!tco_sts)
return;
smihandler_check_illegal_access(tco_sts);
smihandler_soc_check_illegal_access(tco_sts);
if (tco_sts & TCO_TIMEOUT) { /* TIMEOUT */
/* Handle TCO timeout */
@ -381,9 +397,6 @@ void smihandler_southbridge_periodic(
printk(BIOS_DEBUG, "Periodic SMI.\n");
}
void __attribute__((weak))
mainboard_smi_gpi_handler(const struct gpi_status *sts) { }
void smihandler_southbridge_gpi(
const struct smm_save_state_ops *save_state_ops)
{
@ -396,8 +409,6 @@ void smihandler_southbridge_gpi(
gpi_clear_get_smi_status(&smi_sts);
}
void __attribute__((weak)) mainboard_smi_espi_handler(void) { }
void smihandler_southbridge_espi(
const struct smm_save_state_ops *save_state_ops)
{
@ -419,10 +430,10 @@ void southbridge_smi_handler(void)
/*
* In SCI mode, execute only those SMI handlers that have
* declared themselves as available for service in that mode
* using smi_handler_get_sci_mask.
* using smihandler_soc_get_sci_mask.
*/
if (pmc_read_pm1_control() & SCI_EN)
smi_sts &= smi_handler_get_sci_mask();
smi_sts &= smihandler_soc_get_sci_mask();
if (!smi_sts)
return;

View File

@ -25,7 +25,7 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void)
return &em64t101_smm_ops;
}
void smihandler_check_illegal_access(uint32_t tco_sts)
void smihandler_soc_check_illegal_access(uint32_t tco_sts)
{
if (!((tco_sts & (1 << 8)) && IS_ENABLED(CONFIG_SPI_FLASH_SMM)
&& fast_spi_wpd_status()))
@ -46,7 +46,7 @@ void smihandler_check_illegal_access(uint32_t tco_sts)
}
/* SMI handlers that should be serviced in SCI mode too. */
uint32_t smi_handler_get_sci_mask(void)
uint32_t smihandler_soc_get_sci_mask(void)
{
uint32_t sci_mask =
SMI_HANDLER_SCI_EN(APM_STS_BIT) |