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coreboot-kgpe-d16
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add cvsignore files for target files. Use gcc -m32 to build on AMD64 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2003-09-26 10:03:47 +00:00
parent 63afbd4fdc
commit 261f2bb70a
4 changed files with 11 additions and 9 deletions
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1
targets/amd/quartet/.cvsignore Normal file
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@ -0,0 +1 @@
quartet

1
targets/amd/solo/.cvsignore Normal file
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@ -0,0 +1 @@
solo

14
targets/amd/solo/Config.lb
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@ -48,6 +48,9 @@ uses CONFIG_CHIP_CONFIGURE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
uses LINUXBIOS_EXTRA_VERSION
uses CC
option CC="gcc -m32"
option CONFIG_CHIP_CONFIGURE=1
@ -65,7 +68,6 @@ option k8=1
option ROM_SIZE=262144
option HAVE_OPTION_TABLE=1
option CONFIG_ROM_STREAM=1
option HAVE_FALLBACK_BOOT=1
@ -79,18 +81,12 @@ option FALLBACK_SIZE=131072
## LinuxBIOS C code runs at this location in RAM
option _RAMBASE=0x00004000
#
###
### Compute the start location and size size of
### The linuxBIOS bootloader.
###
#
# AMD Solo
romimage "normal"
option USE_FALLBACK_IMAGE=0
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Normal"
option LINUXBIOS_EXTRA_VERSION=".0-Normal"
mainboard amd/solo
payload /suse/stepan/tg3--ide_disk.zelf
end
@ -98,7 +94,7 @@ end
romimage "fallback"
option USE_FALLBACK_IMAGE=1
option ROM_IMAGE_SIZE=0x10000
option LINUXBIOS_EXTRA_VERSION=".0Fallback"
option LINUXBIOS_EXTRA_VERSION=".0-Fallback"
mainboard amd/solo
payload /suse/stepan/tg3--ide_disk.zelf
end

4
targets/newisys/khepri/Config.lb
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@ -51,6 +51,10 @@ uses CONFIG_CHIP_CONFIGURE
uses XIP_ROM_SIZE
uses XIP_ROM_BASE
uses LINUXBIOS_EXTRA_VERSION
uses CC
# set target C compiler to 32bit gcc.
option CC="gcc -m32"
# Configuration options.