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armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write 

As a follow up to Change-Id: I1fb3fc139e0a813acf9d70f14386a9603c9f9ede,
use as builtin compiler hint instead of inline assembly to allow the
compiler to generate more efficient code.

Change-Id: I690514ac6d8988a6494ad3a77690709d932802b0
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/12083
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Paul Kocialkowski 2015-09-22 22:16:33 +02:00 committed by Patrick Georgi
parent eebe0e0db1
commit 263522db97
1 changed files with 6 additions and 15 deletions
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21
src/arch/arm/include/armv7/arch/io.h
View File

@ -34,49 +34,40 @@
static inline uint8_t read8(const void *addr)
{
uint8_t val;
dmb();
asm volatile ("ldrb %0, [%1]" : "=r" (val) : "r" (addr) : "memory");
return val;
return *(volatile uint8_t *)__builtin_assume_aligned(addr, sizeof(uint8_t));
}
static inline uint16_t read16(const void *addr)
{
uint16_t val;
dmb();
asm volatile ("ldrh %0, [%1]" : "=r" (val) : "r" (addr) : "memory");
return val;
return *(volatile uint16_t *)__builtin_assume_aligned(addr, sizeof(uint16_t));
}
static inline uint32_t read32(const void *addr)
{
uint32_t val;
dmb();
asm volatile ("ldr %0, [%1]" : "=r" (val) : "r" (addr) : "memory");
return val;
return *(volatile uint32_t *)__builtin_assume_aligned(addr, sizeof(uint32_t));
}
static inline void write8(void *addr, uint8_t val)
{
dmb();
asm volatile ("strb %0, [%1]" : : "r" (val), "r" (addr) : "memory");
*(volatile uint8_t *)__builtin_assume_aligned(addr, sizeof(uint8_t)) = val;
dmb();
}
static inline void write16(void *addr, uint16_t val)
{
dmb();
asm volatile ("strh %0, [%1]" : : "r" (val), "r" (addr) : "memory");
*(volatile uint16_t *)__builtin_assume_aligned(addr, sizeof(uint16_t)) = val;
dmb();
}
static inline void write32(void *addr, uint32_t val)
{
dmb();
asm volatile ("str %0, [%1]" : : "r" (val), "r" (addr) : "memory");
*(volatile uint32_t *)__builtin_assume_aligned(addr, sizeof(uint32_t)) = val;
dmb();
}