soc/intel/common: Remove extra call layer
Change-Id: I6987eb58b593e1f2bc6adf91be61bf7b5382440d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38122 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -178,21 +178,6 @@ int do_smbus_read_word(unsigned int smbus_base, u8 device, unsigned int address)
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return data;
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}
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static u16 smbus_read_word(u8 addr, u8 offset)
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{
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return do_smbus_read_word(SMBUS_IO_BASE, addr, offset);
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}
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static u8 smbus_read_byte(u8 addr, u8 offset)
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{
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return do_smbus_read_byte(SMBUS_IO_BASE, addr, offset);
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}
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static u8 smbus_write_byte(u8 addr, u8 offset, u8 value)
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{
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return do_smbus_write_byte(SMBUS_IO_BASE, addr, offset, value);
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}
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static void update_spd_len(struct spd_block *blk)
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{
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u8 i, j = 0;
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@ -218,15 +203,15 @@ static void smbus_read_spd(u8 *spd, u8 addr)
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for (i = 0; i < SPD_PAGE_LEN; i += step) {
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if (CONFIG(SPD_READ_BY_WORD))
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((u16*)spd)[i / sizeof(uint16_t)] =
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smbus_read_word(addr, i);
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do_smbus_read_word(SMBUS_IO_BASE, addr, i);
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else
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spd[i] = smbus_read_byte(addr, i);
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spd[i] = do_smbus_read_byte(SMBUS_IO_BASE, addr, i);
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}
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}
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static void get_spd(u8 *spd, u8 addr)
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{
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if (smbus_read_byte(addr, 0) == 0xff) {
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if (do_smbus_read_byte(SMBUS_IO_BASE, addr, 0) == 0xff) {
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printk(BIOS_INFO, "No memory dimm at address %02X\n",
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addr << 1);
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/* Make sure spd is zeroed if dimm doesn't exist. */
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@ -239,10 +224,10 @@ static void get_spd(u8 *spd, u8 addr)
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if (spd[SPD_DRAM_TYPE] == SPD_DRAM_DDR4 &&
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CONFIG_DIMM_SPD_SIZE > SPD_PAGE_LEN) {
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/* Switch to page 1 */
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smbus_write_byte(SPD_PAGE_1, 0, 0);
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do_smbus_write_byte(SMBUS_IO_BASE, SPD_PAGE_1, 0, 0);
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smbus_read_spd(spd + SPD_PAGE_LEN, addr);
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/* Restore to page 0 */
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smbus_write_byte(SPD_PAGE_0, 0, 0);
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do_smbus_write_byte(SMBUS_IO_BASE, SPD_PAGE_0, 0, 0);
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}
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}
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