From 26651c85a03bbe09e17d0e17757c882dae404ebd Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 13 Oct 2022 16:12:40 +0200 Subject: [PATCH] soc/amd/stoneyridge: use devicetree ops over pci driver Stoneyridge is a SoC so it makes sense to statically use ops instead of matching them to PCI DID/VID at runtime. In contrast to the other AMD SoCs in the coreboot tree the PC driver used the PCI ID of the first HT PCI device function, so add the ops to the device 0x18 function 0 devicetree entry in this patch. Signed-off-by: Felix Held Change-Id: I500521701479aa271ebd61e22a1494c8bfaf87fb Reviewed-on: https://review.coreboot.org/c/coreboot/+/68408 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/chipset_cz.cb | 6 +++--- src/soc/amd/stoneyridge/chipset_st.cb | 6 +++--- src/soc/amd/stoneyridge/northbridge.c | 13 +------------ src/soc/amd/stoneyridge/usb.c | 18 +----------------- 4 files changed, 8 insertions(+), 35 deletions(-) diff --git a/src/soc/amd/stoneyridge/chipset_cz.cb b/src/soc/amd/stoneyridge/chipset_cz.cb index f808f6d42b..54acf2a075 100644 --- a/src/soc/amd/stoneyridge/chipset_cz.cb +++ b/src/soc/amd/stoneyridge/chipset_cz.cb @@ -25,13 +25,13 @@ chip soc/amd/stoneyridge device pci 08.0 alias crypto on end # cryptography coprocessor / PSP device pci 09.0 alias hda_bridge off end # host audio bridge device pci 09.2 alias hda off end # main HD Audio Controller - device pci 10.0 alias xhci off end + device pci 10.0 alias xhci off ops stoneyridge_usb_ops end device pci 11.0 alias sata off end - device pci 12.0 alias ehci off end + device pci 12.0 alias ehci off ops stoneyridge_usb_ops end device pci 14.0 alias smbus on end # primary FCH function device pci 14.3 alias lpc_bridge on end device pci 14.7 alias sdhci off end - device pci 18.0 alias ht_0 on end + device pci 18.0 alias ht_0 on ops stoneyridge_northbridge_operations end device pci 18.1 alias ht_1 on end device pci 18.2 alias ht_2 on end device pci 18.3 alias ht_3 on end diff --git a/src/soc/amd/stoneyridge/chipset_st.cb b/src/soc/amd/stoneyridge/chipset_st.cb index 4e398b89db..be630d963f 100644 --- a/src/soc/amd/stoneyridge/chipset_st.cb +++ b/src/soc/amd/stoneyridge/chipset_st.cb @@ -19,13 +19,13 @@ chip soc/amd/stoneyridge device pci 08.0 alias crypto on end # cryptography coprocessor / PSP device pci 09.0 alias hda_bridge off end # host audio bridge device pci 09.2 alias hda off end # main HD Audio Controller - device pci 10.0 alias xhci off end + device pci 10.0 alias xhci off ops stoneyridge_usb_ops end device pci 11.0 alias sata off end - device pci 12.0 alias ehci off end + device pci 12.0 alias ehci off ops stoneyridge_usb_ops end device pci 14.0 alias smbus on end # primary FCH function device pci 14.3 alias lpc_bridge on end device pci 14.7 alias sdhci off end - device pci 18.0 alias ht_0 on end + device pci 18.0 alias ht_0 on ops stoneyridge_northbridge_operations end device pci 18.1 alias ht_1 on end device pci 18.2 alias ht_2 on end device pci 18.3 alias ht_3 on end diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 4549abb894..7e938964be 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -310,7 +310,7 @@ static unsigned long agesa_write_acpi_tables(const struct device *device, return current; } -static struct device_operations northbridge_operations = { +struct device_operations stoneyridge_northbridge_operations = { .read_resources = read_resources, .set_resources = set_resources, .enable_resources = pci_dev_enable_resources, @@ -319,17 +319,6 @@ static struct device_operations northbridge_operations = { .write_acpi_tables = agesa_write_acpi_tables, }; -static const unsigned short pci_device_ids[] = { - PCI_DID_AMD_15H_MODEL_606F_NB_HT, - PCI_DID_AMD_15H_MODEL_707F_NB_HT, - 0 }; - -static const struct pci_driver family15_northbridge __pci_driver = { - .ops = &northbridge_operations, - .vendor = PCI_VID_AMD, - .devices = pci_device_ids, -}; - /* * Enable VGA cycles. Set memory ranges of the FCH legacy devices (TPM, HPET, * BIOS RAM, Watchdog Timer, IOAPIC and ACPI) as non-posted. Set remaining diff --git a/src/soc/amd/stoneyridge/usb.c b/src/soc/amd/stoneyridge/usb.c index efb50cd6f7..977144f06c 100644 --- a/src/soc/amd/stoneyridge/usb.c +++ b/src/soc/amd/stoneyridge/usb.c @@ -41,7 +41,7 @@ int __weak mainboard_get_ehci_oc_map(uint16_t *map) return -1; } -static struct device_operations usb_ops = { +struct device_operations stoneyridge_usb_ops = { .read_resources = pci_ehci_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, @@ -50,19 +50,3 @@ static struct device_operations usb_ops = { .acpi_name = soc_acpi_name, .ops_pci = &pci_dev_ops_pci, }; - -static const unsigned short pci_device_ids[] = { - PCI_DID_AMD_SB900_USB_18_0, - PCI_DID_AMD_SB900_USB_18_2, - PCI_DID_AMD_SB900_USB_20_5, - PCI_DID_AMD_CZ_USB_0, - PCI_DID_AMD_CZ_USB_1, - PCI_DID_AMD_CZ_USB3_0, - 0 -}; - -static const struct pci_driver usb_0_driver __pci_driver = { - .ops = &usb_ops, - .vendor = PCI_VID_AMD, - .devices = pci_device_ids, -};