ec/51nb: add support for NPCE985LA0DX EC
Add support for the NPCE985LA0DX, as used on the 51NB X210 (to be added in a follow-on commit, and from which this was extracted). Original source: https://review.coreboot.org/c/coreboot/+/32531/37 Change-Id: I5798fad7fd18083cde1aa647fd91ca9c5ce963b7 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Matthew Garrett <mjg59@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39567 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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# SPDX-License-Identifier: GPL-2.0-or-later
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# This file is part of the coreboot project.
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config EC_51NB_NPCE985LA0DX
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bool
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default n
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help
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Support for the 51NB NPCE985LA0DX EC
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if EC_51NB_NPCE985LA0DX
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comment "Please select the following otherwise your laptop cannot be powered on."
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config EC_51NB_NPCE985LA0DX_FIRMWARE
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bool "Add firmware image for 51NB NPCE985LA0DX EC"
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depends on EC_51NB_NPCE985LA0DX
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default n
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help
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Select this option to add the firmware blob for the 51NB EC.
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You need this blob to power on your machine.
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config EC_51NB_NPCE985LA0DX_FW
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string "51NB EC firmware path"
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depends on EC_51NB_NPCE985LA0DX_FIRMWARE
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default "ec.bin"
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help
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The path and filename of the file to use as 51NB firmware.
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endif
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# SPDX-License-Identifier: GPL-2.0-or-later
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# This file is part of the coreboot project.
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ifeq ($(CONFIG_EC_51NB_NPCE985LA0DX),y)
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files_added::
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ifeq ($(CONFIG_EC_51NB_NPCE985LA0DX_FIRMWARE),y)
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$(CBFSTOOL) $(obj)/coreboot.rom write -r EC -f $(CONFIG_EC_51NB_NPCE985LA0DX_FW) --fill-upward
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endif
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build_complete::
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ifeq ($(CONFIG_EC_51NB_NPCE985LA0DX_FIRMWARE),)
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printf "\n** WARNING **\n"
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printf "You haven't added the firmware blobs for 51NB EC.\n"
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printf "You may be unable to power on your laptop without these blobs.\n"
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printf "Please select the following option to add them:\n\n"
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printf " Chipset --->\n"
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printf " [*] Add firmware images for 51NB EC\n\n"
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endif
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ramstage-y += npce985la0dx.c
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endif
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* This file is part of the coreboot project. */
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#include <device/pnp.h>
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/*
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* This embedded controller looks awfully like a Super I/O chip. LDNs 5 and 6
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* need to be enabled to turn on the keyboard and mouse controller, and LDN
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* 0x11 needs to be enabled to turn on ACPI embedded controller functionality.
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*/
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static struct pnp_info dev_infos[] = {
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{ NULL, 0x05 }, { NULL, 0x06 }, { NULL, 0x11 }
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};
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static void ec_51nb_npce985la0dx_ops_enable(struct device *dev)
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{
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pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(dev_infos), dev_infos);
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}
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struct chip_operations ec_51nb_npce985la0dx_ops = {
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CHIP_NAME("51NB EC")
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.enable_dev = ec_51nb_npce985la0dx_ops_enable,
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};
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